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Henk-Jan Lebbink edited this page Jun 4, 2026
·
13 revisions
FFREE — Free Floating-Point Register
Opcode
Instruction
64-Bit Mode
Compat/ Leg Mode
Description
DD C0+i
FFREE ST(i)
Valid
Valid
Sets tag for ST(i) to empty.
Description
Sets the tag in the FPU tag register associated with register ST(i) to empty (11B). The contents of ST(i) and the
FPU stack-top pointer (TOP) are not affected.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
TAG(i) ← 11B;
FPU Flags Affected
C0, C1, C2, C3 undefined.
Floating-Point Exceptions
None
Protected Mode Exceptions
#NM
CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#MF
If there is a pending x87 FPU exception.
#UD
If the LOCK prefix is used.
Real-Address Mode Exceptions
Same exceptions as in protected mode.
Virtual-8086 Mode Exceptions
Same exceptions as in protected mode.
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
Same exceptions as in protected mode.
Source: Intel® 64 and IA-32 Architectures Software Developer's Manual, Combined Volumes (Order Number 325462-091US, March 2026) Generated: 7-6-2026