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FCHS
FCHS — Change Sign
| Opcode | Instruction | 64-Bit Mode | Compat/ Leg Mode | Description |
| D9 E0 | FCHS | Valid | Valid | Complements sign of ST(0). |
Complements the sign bit of ST(0). This operation changes a positive value into a negative value of equal magnitude or vice versa. The following table shows the results obtained when changing the sign of various classes of numbers.
Table 3-22. FCHS Results
| ST(0) SRC | ST(0) DEST |
| − ∞ | + ∞ |
| − F | + F |
| − 0 | + 0 |
| + 0 | − 0 |
| + F | − F |
| + ∞ | − ∞ |
| NaN | NaN |
* F means finite floating-point value.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
SignBit(ST(0)) ← NOT (SignBit(ST(0)));C1 Set to 0. C0, C2, C3 Undefined.
#IS Stack underflow occurred.
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#UD If the LOCK prefix is used.
Same exceptions as in protected mode.
Same exceptions as in protected mode.
Same exceptions as in protected mode.
Same exceptions as in protected mode.
Source: Intel® 64 and IA-32 Architectures Software Developer's Manual, Combined Volumes (Order Number 325462-091US, March 2026)
Generated: 7-6-2026