Add splat config for PW64 jp (kernel, libultra, RSP)

Makefile

@@ -128,7 +128,12 @@ GLOBAL_ASM_C_FILES := $(shell $(GREP) GLOBAL_ASM $(SRC_DIR) </dev/null 2>/dev/nu
 GLOBAL_ASM_O_FILES := $(foreach file,$(GLOBAL_ASM_C_FILES:.c=.o),$(BUILD_DIR)/$(file))
 
 DEFINES := -D_LANGUAGE_C -D_FINALROM -DWIN32 -DNDEBUG -DTARGET_N64 -DCOMPILING_LIBULTRA
-DEFINES += -DVERSION_US
+ifeq ($(VERSION),us)
+  DEFINES += -DVERSION_US
+else ifeq ($(VERSION),jp)
+  DEFINES += -DVERSION_JP
+endif
+
 DEFINES += -DBUILD_VERSION=VERSION_D
 
 ifneq ($(RECOMP_BUILD),0)

config/jp/pilotwings64.jp.sha1

@@ -0,0 +1 @@
+892a5472d9a6811b881d093020de81f72baeeec9  build/pilotwings64.jp.z64

config/jp/sym/hardware_regs.ld

@@ -0,0 +1,113 @@
+
+SP_MEM_ADDR_REG = 0xA4040000;
+SP_DRAM_ADDR_REG = 0xA4040004;
+SP_RD_LEN_REG = 0xA4040008;
+SP_WR_LEN_REG = 0xA404000C;
+SP_STATUS_REG = 0xA4040010;
+SP_DMA_FULL_REG = 0xA4040014;
+SP_DMA_BUSY_REG = 0xA4040018;
+SP_SEMAPHORE_REG = 0xA404001C;
+
+SP_PC = 0xA4080000;
+
+DPC_START_REG = 0xA4100000;
+DPC_END_REG = 0xA4100004;
+DPC_CURRENT_REG = 0xA4100008;
+DPC_STATUS_REG = 0xA410000C;
+DPC_CLOCK_REG = 0xA4100010;
+DPC_BUFBUSY_REG = 0xA4100014;
+DPC_PIPEBUSY_REG = 0xA4100018;
+DPC_TMEM_REG = 0xA410001C;
+
+DPS_TBIST_REG = 0xA4200000;
+DPS_TEST_MODE_REG = 0xA4200004;
+DPS_BUFTEST_ADDR_REG = 0xA4200008;
+DPS_BUFTEST_DATA_REG = 0xA420000C;
+
+MI_MODE_REG = 0xA4300000;
+MI_VERSION_REG = 0xA4300004;
+MI_INTR_REG = 0xA4300008;
+MI_INTR_MASK_REG = 0xA430000C;
+
+VI_STATUS_REG = 0xA4400000;
+VI_DRAM_ADDR_REG = 0xA4400004;
+VI_WIDTH_REG = 0xA4400008;
+VI_INTR_REG = 0xA440000C;
+VI_CURRENT_REG = 0xA4400010;
+VI_BURST_REG = 0xA4400014;
+VI_V_SYNC_REG = 0xA4400018;
+VI_H_SYNC_REG = 0xA440001C;
+VI_LEAP_REG = 0xA4400020;
+VI_H_START_REG = 0xA4400024;
+VI_V_START_REG = 0xA4400028;
+VI_V_BURST_REG = 0xA440002C;
+VI_X_SCALE_REG = 0xA4400030;
+VI_Y_SCALE_REG = 0xA4400034;
+
+AI_DRAM_ADDR_REG = 0xA4500000;
+AI_LEN_REG = 0xA4500004;
+AI_CONTROL_REG = 0xA4500008;
+AI_STATUS_REG = 0xA450000C;
+AI_DACRATE_REG = 0xA4500010;
+AI_BITRATE_REG = 0xA4500014;
+
+PI_DRAM_ADDR_REG = 0xA4600000;
+PI_CART_ADDR_REG = 0xA4600004;
+D_A4600005 = 0xA4600005;
+D_A4600006 = 0xA4600006;
+D_A4600007 = 0xA4600007;
+PI_RD_LEN_REG = 0xA4600008;
+PI_WR_LEN_REG = 0xA460000C;
+PI_STATUS_REG = 0xA4600010;
+PI_BSD_DOM1_LAT_REG = 0xA4600014;
+PI_BSD_DOM1_PWD_REG = 0xA4600018;
+PI_BSD_DOM1_PGS_REG = 0xA460001C;
+PI_BSD_DOM1_RLS_REG = 0xA4600020;
+PI_BSD_DOM2_LAT_REG = 0xA4600024;
+PI_BSD_DOM2_LWD_REG = 0xA4600028;
+PI_BSD_DOM2_PGS_REG = 0xA460002C;
+PI_BSD_DOM2_RLS_REG = 0xA4600030;
+
+RI_MODE_REG = 0xA4700000;
+RI_CONFIG_REG = 0xA4700004;
+RI_CURRENT_LOAD_REG = 0xA4700008;
+RI_SELECT_REG = 0xA470000C;
+RI_REFRESH_REG = 0xA4700010;
+RI_LATENCY_REG = 0xA4700014;
+RI_RERROR_REG = 0xA4700018;
+RI_WERROR_REG = 0xA470001C;
+
+SI_DRAM_ADDR_REG = 0xA4800000;
+SI_PIF_ADDR_RD64B_REG = 0xA4800004;
+D_A4800008 = 0xA4800008;
+D_A480000C = 0xA480000C;
+SI_PIF_ADDR_WR64B_REG = 0xA4800010;
+D_A4800014 = 0xA4800014;
+SI_STATUS_REG = 0xA4800018;
+
+LEO_CMD = 0xA5000508;
+LEO_STATUS = 0xA5000508;
+LEO_BM_CTL = 0xA5000510;
+LEO_BM_STATUS = 0xA5000510;
+LEO_SEQ_CTL = 0xA5000518;
+LEO_SEQ_STATUS = 0xA5000518;
+LEO_C2_BUFF = 0xA5000000;
+LEO_SECTOR_BUFF = 0xA5000400;
+LEO_DATA = 0xA5000500;
+LEO_MISC_REG = 0xA5000504;
+LEO_CUR_TK = 0xA500050C;
+LEO_ERR_SECTOR = 0xA5000514;
+LEO_CUR_SECTOR = 0xA500051C;
+LEO_HARD_RESET = 0xA5000520;
+LEO_C1_S0 = 0xA5000524;
+LEO_HOST_SECBYTE = 0xA5000528;
+LEO_C1_S2 = 0xA500052C;
+LEO_SEC_BYTE = 0xA5000530;
+LEO_C1_S4 = 0xA5000534;
+LEO_C1_S6 = 0xA5000538;
+LEO_CUR_ADDR = 0xA500053C;
+LEO_ID_REG = 0xA5000540;
+LEO_TEST_REG = 0xA5000544;
+LEO_TEST_PIN_SEL = 0xA5000548;
+LEO_RAM_ADDR = 0xA5000580;
+

config/jp/sym/libultra_undefined_syms.txt

@@ -0,0 +1,2 @@
+
+

config/jp/sym/pif_syms.ld

@@ -0,0 +1,11 @@
+
+leoBootID = 0x800001a0;
+osTvType = 0x80000300;
+osRomType = 0x80000304;
+osRomBase = 0x80000308;
+osResetType = 0x8000030c;
+osCicId = 0x80000310;
+osVersion = 0x80000314;
+osMemSize = 0x80000318;
+osAppNMIBuffer = 0x8000031c;
+

config/jp/sym/reloc_addrs.txt

@@ -0,0 +1,12 @@
+// Visit https://github.com/ethteck/splat/wiki/Advanced-Reloc for documentation about this file
+// entrypoint relocs
+rom:0x001000 reloc:MIPS_HI16 symbol:kernel_BSS_START
+rom:0x001008 reloc:MIPS_LO16 symbol:kernel_BSS_START
+
+// This entry corresponds to the "stack top", which is the end of the array used as the stack for the main segment.
+// It is commented out because it was not possible to infer what the start of the stack symbol is, so you'll have to figure it out by yourself.
+// Once you have found it you can properly name it and specify the length of this stack as the addend value here.
+// The address of the end of the stack is 0x802B5FE0.
+// A common size for this stack is 0x2000, so try checking for the address 0x802B3FE0. Note the stack may have a different size.
+// rom:0x001028 reloc:MIPS_HI16 symbol:main_stack addend:0xXXXX
+// rom:0x001034 reloc:MIPS_LO16 symbol:main_stack addend:0xXXXX