Ignore the sub-microsecond power-up glitch in Saleae timing

[byeongjee]

Regression

ckpt bench/verify on any benchmark failed with

Ambiguous Saleae capture on channel 0: detected 2 start pulses before the stop pulse.

Introduced by 13b97fb ("Power bench and verify targets from the Otii instead of the ez-FET"): the target is now powered from the Otii main output, so every run starts from a cold supply. While VCC ramps, P3.4 is high-impedance — the firmware cannot clear LOCKLPM5 and drive it low until the CPU runs — so the line follows the rail across the analyzer threshold. Under the ez-FET the rail was already up when mspdebug released the target, so this pulse never existed.

Measured on build/aes.elf (repeatable to the sample across runs):

power path	pulses before the stop pulse
ez-FET (before 13b97fb)	72.5 µs start pulse
Otii (13b97fb)	0.38 µs glitch, then 4.295 ms later the 72.5 µs start pulse

Start→stop is 25.58 ms on both paths, so only the extra glitch is new.

Fix

Classify a start pulse as 2 µs <= width < 1 ms, in both _extract_timing
(bench/verify) and _replay_timing_from_pulses (intermittent). The nominal
start pulse is 10 µs, five times the floor; the glitch is well below it. The
ambiguity check that catches genuine restarts is unchanged. A pulldown on P3.4
would remove the glitch at the source; this is the software-only fix.

Comments and docs (benchmark.h, docs/saleae.md, docs/intermittent.md) now
describe the glitch, and docs/saleae.md notes that the 10 µs / 5 ms widths are
nominal — _timing_delay_cycles counts iterations, not cycles, so the real
pulses are ~70 µs / ~34 ms at 16 MHz.

Test plan

• uv run pytest tests/test_saleae_timing.py tests/test_intermittent.py — 27 passed, including two new regression tests built from the captured waveform.
• On hardware: uv run ckpt bench uninstrumented aes --timeout 120 → OK compilation_time=806ms execution_time=25551.71us, matching the ez-FET reference.
• ckpt bench milp crc was not run: passes/build/CheckpointPass.so is not built in this workspace. The timing path is shared with the uninstrumented run.