Power bench and verify targets from the Otii instead of the ez-FET

[byeongjee]

Problem

In swbor continuous-power runs, ckpt bench/verify power the target from
the ez-FET's 3V3 rail. A few seconds after mspdebug releases the target, the
ez-FET issues a reset over SBW; in swbor the program is still running, so the
reset lands mid-region and is flagged as an energy violation. The same build
fails ~60% of the time (see issue #72 for the full investigation).

Change

With an Otii switchboard in the loop, bench and verify now flash the target
through the relays, then isolate it from the ez-FET and power it from the Otii
main output at a constant 3.3 V for the run, reconnecting the debugger only for
the NVM readback. Without an Otii both commands fall back to the previous
ez-FET path unchanged.

• device/otii.py: debugger_connection() yields the OtiiSession; add
  power_target().
• device/saleae.py: saleae_run() takes the session and either releases the
  target under the ez-FET or isolates-and-powers it from the Otii, always
  reconnecting the debugger afterward.
• Thread the session through the bench/verify runners; update docs and tests.

Testing

• dijkstra at 10uF over the Otii path: 2/2 completed (95 boundaries, no
  violation), where the ez-FET path failed ~60%.
• unit tests, ruff, pyright pass.

Wiring note: for these runs the Otii main output is wired directly to the board
rail without the intermittent rig's 5.6 kΩ resistor and schottky diode
(docs/intermittent.md).