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drivers/serial: Refactor PL011 to be general-purpose #18837

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33 changes: 2 additions & 31 deletions arch/arm/src/cxd32xx/cxd32_serial_pl011.c
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Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ void arm_earlyserialinit(void)
* when they are first opened.
*/

pl011_earlyserialinit();
#error "Not implemented"
}
#endif

Expand All @@ -73,36 +73,7 @@ void arm_earlyserialinit(void)

void arm_serialinit(void)
{
pl011_serialinit();
#error "Not implemented"
}

#ifdef CONFIG_UART_PL011_PLATFORMIF
/***************************************************************************
* Name: pl011_platform interface
*
* Description:
* see drivers/serial/serial_pl011.c
* pl011_setup
* pl011_shutdown
*
***************************************************************************/

int pl011_platform_setup(uint32_t base)
{
/* If needed, implement platform specific process such as enabling pl011
* to reduce power consumption.
*/

return 0;
}

int pl011_platform_shutdown(uint32_t base)
{
/* If needed, implement platform specific process such as disabling pl011
* to reduce power consumption.
*/

return 0;
}
#endif /* CONFIG_UART_PL011_PLATFORMIF */
#endif /* USE_SERIALDRIVER */
40 changes: 40 additions & 0 deletions arch/arm/src/fvp-v8r-aarch32/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -19,4 +19,44 @@ endchoice # FVP Chip Selection

endmenu # "FVP Chip Selection"

menu "FVP ARMv8-R Peripheral Selection"

config FVP_ARMV8R_UART0
bool "UART0"
default n
select UART_PL011
select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Select to enable support for UART0.

config FVP_ARMV8R_UART1
bool "UART1"
default y
select UART_PL011
select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Select to enable support for UART1.

config FVP_ARMV8R_UART2
bool "UART2"
default n
select UART_PL011
select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Select to enable support for UART2.

config FVP_ARMV8R_UART3
bool "UART3"
default n
select UART_PL011
select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Select to enable support for UART3.

endmenu # FVP ARMv8-R Peripheral Selection

endif # ARCH_CHIP_FVP_ARMV8R_AARCH32
206 changes: 202 additions & 4 deletions arch/arm/src/fvp-v8r-aarch32/fvp_serial.c
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Original file line number Diff line number Diff line change
Expand Up @@ -38,12 +38,187 @@

#include "arm_internal.h"

/***************************************************************************
* Pre-processor definitions
***************************************************************************/

#if defined(CONFIG_UART0_SERIAL_CONSOLE)
#define CONSOLE_DEV g_pl011_port0
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
#define CONSOLE_DEV g_pl011_port1
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
#define CONSOLE_DEV g_pl011_port2
#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
#define CONSOLE_DEV g_pl011_port3
#endif

/* QEMU-specific configuration parameters */

#define UART0_BASEADDR (0x9c090000)
#define UART0_CLK_FREQ (24000000)
#define UART0_IRQ (37)

#define UART1_BASEADDR (0x9c0a0000)
#define UART1_CLK_FREQ (24000000)
#define UART1_IRQ (38)

#define UART2_BASEADDR (0x9c0b0000)
#define UART2_CLK_FREQ (24000000)
#define UART2_IRQ (39)

#define UART3_BASEADDR (0x9c0c0000)
#define UART3_CLK_FREQ (24000000)
#define UART3_IRQ (40)

/***************************************************************************
* Private data
***************************************************************************/

#ifdef CONFIG_UART0_SERIALDRIVER
static char g_uart0_rx_buf[CONFIG_UART0_RXBUFSIZE];
static char g_uart0_tx_buf[CONFIG_UART0_TXBUFSIZE];

static struct pl011_uart_port_s g_pl011_port0 =
{
.config =
{
.baseaddr = (void *)UART0_BASEADDR,
.baud_rate = CONFIG_UART0_BAUD,
.irq_num = UART0_IRQ,
.sbsa = false,
.sys_clk_freq = UART0_CLK_FREQ,
},

.uart =
{
.recv =
{
.buffer = g_uart0_rx_buf,
.size = CONFIG_UART0_RXBUFSIZE,
},
.xmit =
{
.buffer = g_uart0_tx_buf,
.size = CONFIG_UART0_TXBUFSIZE,
},
},
};
#endif

#ifdef CONFIG_UART1_SERIALDRIVER
static char g_uart1_rx_buf[CONFIG_UART1_RXBUFSIZE];
static char g_uart1_tx_buf[CONFIG_UART1_TXBUFSIZE];

static struct pl011_uart_port_s g_pl011_port1 =
{
.config =
{
.baseaddr = (void *)UART1_BASEADDR,
.baud_rate = CONFIG_UART1_BAUD,
.irq_num = UART1_IRQ,
.sbsa = false,
.sys_clk_freq = UART1_CLK_FREQ,
},

.uart =
{
.recv =
{
.buffer = g_uart1_rx_buf,
.size = CONFIG_UART1_RXBUFSIZE,
},
.xmit =
{
.buffer = g_uart1_tx_buf,
.size = CONFIG_UART1_TXBUFSIZE,
},
},
};
#endif

#ifdef CONFIG_UART2_SERIALDRIVER
static char g_uart2_rx_buf[CONFIG_UART2_RXBUFSIZE];
static char g_uart2_tx_buf[CONFIG_UART2_TXBUFSIZE];

static struct pl011_uart_port_s g_pl011_port2 =
{
.config =
{
.baseaddr = (void *)UART2_BASEADDR,
.baud_rate = CONFIG_UART2_BAUD,
.irq_num = UART2_IRQ,
.sbsa = false,
.sys_clk_freq = UART2_CLK_FREQ,
},

.uart =
{
.recv =
{
.buffer = g_uart2_rx_buf,
.size = CONFIG_UART2_RXBUFSIZE,
},
.xmit =
{
.buffer = g_uart2_tx_buf,
.size = CONFIG_UART2_TXBUFSIZE,
},
},
};
#endif

#ifdef CONFIG_UART3_SERIALDRIVER
static char g_uart3_rx_buf[CONFIG_UART3_RXBUFSIZE];
static char g_uart3_tx_buf[CONFIG_UART3_TXBUFSIZE];

static struct pl011_uart_port_s g_pl011_port3 =
{
.config =
{
.baseaddr = (void *)UART3_BASEADDR,
.baud_rate = CONFIG_UART3_BAUD,
.irq_num = UART3_IRQ,
.sbsa = false,
.sys_clk_freq = UART3_CLK_FREQ,
},

.uart =
{
.recv =
{
.buffer = g_uart3_rx_buf,
.size = CONFIG_UART3_RXBUFSIZE,
},
.xmit =
{
.buffer = g_uart3_tx_buf,
.size = CONFIG_UART3_TXBUFSIZE,
},
},
};
#endif

#ifdef USE_SERIALDRIVER

/***************************************************************************
* Public Functions
***************************************************************************/

/***************************************************************************
* Name: up_putc
*
* Description:
* Provide priority, low-level access to support OS debug writes
*
***************************************************************************/

#ifdef CONSOLE_DEV
void up_putc(int ch)
{
pl011_putc(&CONSOLE_DEV.uart, ch);
}
#endif

/***************************************************************************
* Name: arm_earlyserialinit
*
Expand All @@ -58,8 +233,10 @@ void arm_earlyserialinit(void)
* when they are first opened.
*/

#ifdef CONFIG_UART_PL011
pl011_earlyserialinit();
#ifdef CONSOLE_DEV
pl011_dev_init(&CONSOLE_DEV);
CONSOLE_DEV.uart.isconsole = true;
CONSOLE_DEV.uart.ops->setup(&CONSOLE_DEV.uart); /* Early set up */
#endif
}

Expand All @@ -73,8 +250,29 @@ void arm_earlyserialinit(void)

void arm_serialinit(void)
{
#ifdef CONFIG_UART_PL011
pl011_serialinit();
#ifdef CONSOLE_DEV
pl011_dev_init(&CONSOLE_DEV);
uart_register("/dev/console", &CONSOLE_DEV.uart);
#endif

#ifdef CONFIG_UART0_SERIALDRIVER
pl011_dev_init(&g_pl011_port0);
uart_register("/dev/ttyS0", &g_pl011_port0.uart);
#endif

#ifdef CONFIG_UART1_SERIALDRIVER
pl011_dev_init(&g_pl011_port1);
uart_register("/dev/ttyS1", &g_pl011_port1.uart);
#endif

#ifdef CONFIG_UART2_SERIALDRIVER
pl011_dev_init(&g_pl011_port2);
uart_register("/dev/ttyS2", &g_pl011_port2.uart);
#endif

#ifdef CONFIG_UART3_SERIALDRIVER
pl011_dev_init(&g_pl011_port3);
uart_register("/dev/ttyS3", &g_pl011_port3.uart);
#endif
}

Expand Down
4 changes: 2 additions & 2 deletions arch/arm/src/goldfish/goldfish_serial.c
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Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ void arm_earlyserialinit(void)
* when they are first opened.
*/

pl011_earlyserialinit();
#error "Not implemented"
}

/***************************************************************************
Expand All @@ -61,7 +61,7 @@ void arm_earlyserialinit(void)

void arm_serialinit(void)
{
pl011_serialinit();
#error "Not implemented"
}

#endif /* CONFIG_UART_PL011 */
25 changes: 25 additions & 0 deletions arch/arm/src/qemu/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -49,5 +49,30 @@ config ARCH_CHIP_QEMU_TRUSTZONE
The default is off. And this config can enable/disable
TrustZone in qemu chip.

#####################################################################
# UART Configuration
#####################################################################

menu "QEMU ARMv7A Peripheral Selection"

config QEMU_UART0
bool "UART0"
default y
select UART_PL011
select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Select to enable support for UART0.

config QEMU_UART1
bool "UART1"
default n
select UART_PL011
select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Select to enable support for UART1.

endmenu # QEMU ARMv7A Peripheral Selection

endif # ARCH_CHIP_QEMU_ARM
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