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feat: Add SNR calculation functionality (Int & Float) #17

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641e7bb
add SNR register definition and function prototypes
ArshiaMadadii Feb 9, 2026
bbd0cce
feat(LoRa): implement SNR calculation logic
ArshiaMadadii Feb 9, 2026
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32 changes: 32 additions & 0 deletions LoRa/LoRa.c
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Original file line number Diff line number Diff line change
Expand Up @@ -515,6 +515,38 @@ int LoRa_getRSSI(LoRa* _LoRa){
return -164 + read;
}

/* ----------------------------------------------------------------------------- *\
name : LoRa_getSNR_x4

description : Reads SNR of the last received packet.
Register RegPktSnrValue (0x19) is signed (two's complement)
with 0.25 dB resolution.

return : SNR * 4 (quarter-dB units)
\* ----------------------------------------------------------------------------- */
int16_t LoRa_getSNR_x4(LoRa* _LoRa)
{
const uint8_t raw = LoRa_read(_LoRa, RegPktSnrValue);

/* Cast to int8_t to correctly interpret two's complement signed value */
const int8_t snr_quarter_db = (int8_t)raw;

/* Value is already in 0.25 dB steps => returned as "x4" */
return (int16_t)snr_quarter_db;
}

/* ----------------------------------------------------------------------------- *\
name : LoRa_getSNR

description : Returns SNR (dB) of the last received packet.

return : SNR in dB (float)
\* ----------------------------------------------------------------------------- */
float LoRa_getSNR(LoRa* _LoRa)
{
return ((float)LoRa_getSNR_x4(_LoRa)) * 0.25f;
}

/* ----------------------------------------------------------------------------- *\
name : LoRa_init

Expand Down
71 changes: 37 additions & 34 deletions LoRa/LoRa.h
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Original file line number Diff line number Diff line change
Expand Up @@ -19,46 +19,46 @@
#define RXSINGLE_MODE 6

//------- BANDWIDTH -------//
#define BW_7_8KHz 0
#define BW_10_4KHz 1
#define BW_15_6KHz 2
#define BW_20_8KHz 3
#define BW_31_25KHz 4
#define BW_41_7KHz 5
#define BW_62_5KHz 6
#define BW_125KHz 7
#define BW_250KHz 8
#define BW_500KHz 9
#define BW_7_8KHz 0
#define BW_10_4KHz 1
#define BW_15_6KHz 2
#define BW_20_8KHz 3
#define BW_31_25KHz 4
#define BW_41_7KHz 5
#define BW_62_5KHz 6
#define BW_125KHz 7
#define BW_250KHz 8
#define BW_500KHz 9

//------ CODING RATE ------//
#define CR_4_5 1
#define CR_4_6 2
#define CR_4_7 3
#define CR_4_8 4
#define CR_4_5 1
#define CR_4_6 2
#define CR_4_7 3
#define CR_4_8 4

//--- SPREADING FACTORS ---//
#define SF_7 7
#define SF_8 8
#define SF_9 9
#define SF_10 10
#define SF_11 11
#define SF_12 12
#define SF_7 7
#define SF_8 8
#define SF_9 9
#define SF_10 10
#define SF_11 11
#define SF_12 12

//------ POWER GAIN ------//
#define POWER_11db 0xF6
#define POWER_14db 0xF9
#define POWER_17db 0xFC
#define POWER_20db 0xFF
#define POWER_11db 0xF6
#define POWER_14db 0xF9
#define POWER_17db 0xFC
#define POWER_20db 0xFF

//------- REGISTERS -------//
#define RegFiFo 0x00
#define RegOpMode 0x01
#define RegFrMsb 0x06
#define RegFrMid 0x07
#define RegFrLsb 0x08
#define RegPaConfig 0x09
#define RegOcp 0x0B
#define RegLna 0x0C
#define RegFiFo 0x00
#define RegOpMode 0x01
#define RegFrMsb 0x06
#define RegFrMid 0x07
#define RegFrLsb 0x08
#define RegPaConfig 0x09
#define RegOcp 0x0B
#define RegLna 0x0C
#define RegFiFoAddPtr 0x0D
#define RegFiFoTxBaseAddr 0x0E
#define RegFiFoRxBaseAddr 0x0F
Expand All @@ -76,10 +76,11 @@
#define RegSyncWord 0x39
#define RegDioMapping1 0x40
#define RegDioMapping2 0x41
#define RegVersion 0x42
#define RegVersion 0x42
#define RegPktSnrValue 0x19

//------ LORA STATUS ------//
#define LORA_OK 200
#define LORA_OK 200
#define LORA_NOT_FOUND 404
#define LORA_LARGE_PAYLOAD 413
#define LORA_UNAVAILABLE 503
Expand Down Expand Up @@ -130,5 +131,7 @@ void LoRa_startReceiving(LoRa* _LoRa);
uint8_t LoRa_receive(LoRa* _LoRa, uint8_t* data, uint8_t length);
void LoRa_receive_IT(LoRa* _LoRa, uint8_t* data, uint8_t length);
int LoRa_getRSSI(LoRa* _LoRa);
int8_t LoRa_getSNR_x4(LoRa* _LoRa);
float LoRa_getSNR(LoRa* _LoRa);

uint16_t LoRa_init(LoRa* _LoRa);