74161.md

74161: 4-bit synchronous binary counter

• Number of elements: 1
• Inputs per element: 4
• Outputs per element: 4
• Bits: 4
• DIP: 16-pin

Description

TODO

Inputs and outputs

Label	Description	Signal
Dn	data inputs	active high
CEP	count Enable Parallel input	active high
CET	count Enable Trickle input	active high
CLK	clock input	positive edge
LE	load enable input	active low
CLR	asynchronous master reset input	active low
TC	terminal count output	active high
Qn	data outputs	active high

Function table

Mode	CLR	CLK	CEP	CET	LE	Dn	Qn	TC
Reset	L	X	X	X	X	X	L	L
Parallel load	H	/	X	X	l	l	L	L
Parallel load	H	/	X	X	l	h	H	t
Count	H	/	h	h	h	X	count	t
Hold	H	X	l	X	h	X	qn	t
Hold	H	X	X	l	h	X	qn	L

• H: HIGH voltage level
• L: LOW voltage level
• h: HIGH voltage level one setup time prior to the clock positive edge
• l: LOW voltage level one setup time prior to clock positive edge
• q: state of corresponding output one setup time prior to the clock positive edge
• t: HIGH when CET is HIGH and the counter is at terminal count (HHHH)
• X: Don't care
• /: positive edge

Pin layout

TODO

	Pin	Pin
CLR	1	16	VCC
CLK	2	15	TC
D1	3	14	Q1
D2	4	13	Q2
D3	5	12	Q3
D4	6	11	Q4
CEP	7	10	CET
GND	8	9	LE

Datasheets

• CD74HC161 by Texas Instruments
• 74HC161 by Nexperia