From dd4996ac89c32267a34c6ccd7f6c731d4fd369c0 Mon Sep 17 00:00:00 2001 From: Matteo Golin Date: Sat, 2 May 2026 12:04:58 -0400 Subject: [PATCH] drivers/serial: Refactor PL011 to be general-purpose This commit refactors the PL011 UART driver so that it can be re-used for any number of UART interfaces depending on the board/chip. This commit also hooks the UART interface configuration/selection for PL011 UART interfaces into the same Kconfig used for regular UART interfaces. Now UART interfaces are configured in a standard, extensible way. Signed-off-by: Matteo Golin --- arch/arm/src/cxd32xx/cxd32_serial_pl011.c | 33 +- arch/arm/src/fvp-v8r-aarch32/Kconfig | 40 ++ arch/arm/src/fvp-v8r-aarch32/fvp_serial.c | 206 +++++++- arch/arm/src/goldfish/goldfish_serial.c | 4 +- arch/arm/src/qemu/Kconfig | 25 + arch/arm/src/qemu/qemu_serial.c | 124 ++++- arch/arm64/src/fvp-v8r/Kconfig | 44 ++ arch/arm64/src/fvp-v8r/fvp_lowputc.S | 4 +- arch/arm64/src/fvp-v8r/fvp_serial.c | 206 +++++++- arch/arm64/src/goldfish/goldfish_serial.c | 4 +- arch/arm64/src/qemu/Kconfig | 26 + arch/arm64/src/qemu/qemu_serial.c | 125 ++++- .../fvp-armv8r-aarch32/configs/nsh/defconfig | 16 +- .../qemu/qemu-armv7a/configs/full/defconfig | 6 +- .../qemu-armv7a/configs/gdbstub/defconfig | 8 +- .../qemu/qemu-armv7a/configs/knsh/defconfig | 6 +- .../qemu-armv7a/configs/knsh_smp/defconfig | 6 +- .../qemu/qemu-armv7a/configs/nsh/defconfig | 6 +- .../qemu-armv7a/configs/rpproxy/defconfig | 6 +- .../qemu-armv7a/configs/rpserver/defconfig | 6 +- .../qemu/qemu-armv7a/configs/smp/defconfig | 6 +- .../fvp-armv8r/configs/citest/defconfig | 16 +- .../fvp-armv8r/configs/citest_smp/defconfig | 16 +- .../fvp-v8r/fvp-armv8r/configs/nsh/defconfig | 16 +- .../fvp-armv8r/configs/nsh_smp/defconfig | 16 +- .../fvp-v8r/fvp-armv8r/configs/pnsh/defconfig | 16 +- .../fvp-armv8r/configs/pnsh_smp/defconfig | 16 +- .../qemu/qemu-armv8a/configs/citest/defconfig | 6 +- .../qemu-armv8a/configs/citest_smp/defconfig | 6 +- .../qemu-armv8a/configs/fastboot/defconfig | 6 +- .../qemu/qemu-armv8a/configs/fb/defconfig | 6 +- .../qemu-armv8a/configs/gdbstub/defconfig | 8 +- .../qemu/qemu-armv8a/configs/knsh/defconfig | 6 +- .../qemu/qemu-armv8a/configs/mte/defconfig | 6 +- .../qemu/qemu-armv8a/configs/netnsh/defconfig | 6 +- .../qemu-armv8a/configs/netnsh_hv/defconfig | 6 +- .../qemu-armv8a/configs/netnsh_smp/defconfig | 6 +- .../configs/netnsh_smp_hv/defconfig | 6 +- .../qemu/qemu-armv8a/configs/nsh/defconfig | 7 +- .../qemu-armv8a/configs/nsh_fiq/defconfig | 6 +- .../qemu-armv8a/configs/nsh_gicv2/defconfig | 6 +- .../qemu-armv8a/configs/nsh_smp/defconfig | 6 +- .../configs/nsh_smp_tickless/defconfig | 6 +- .../qemu-armv8a/configs/rpproxy/defconfig | 6 +- .../qemu-armv8a/configs/rpserver/defconfig | 6 +- .../qemu/qemu-armv8a/configs/sotest/defconfig | 6 +- .../qemu-armv8a/configs/sw_tags/defconfig | 6 +- .../qemu-armv8a/configs/xedge_demo/defconfig | 6 +- drivers/serial/Kconfig | 4 - drivers/serial/Kconfig-pl011 | 88 ---- drivers/serial/uart_pl011.c | 445 +++--------------- include/nuttx/serial/uart_pl011.h | 44 +- 52 files changed, 940 insertions(+), 773 deletions(-) delete mode 100644 drivers/serial/Kconfig-pl011 diff --git a/arch/arm/src/cxd32xx/cxd32_serial_pl011.c b/arch/arm/src/cxd32xx/cxd32_serial_pl011.c index 9c33fa630fa5c..be9fce7797169 100644 --- a/arch/arm/src/cxd32xx/cxd32_serial_pl011.c +++ b/arch/arm/src/cxd32xx/cxd32_serial_pl011.c @@ -59,7 +59,7 @@ void arm_earlyserialinit(void) * when they are first opened. */ - pl011_earlyserialinit(); + #error "Not implemented" } #endif @@ -73,36 +73,7 @@ void arm_earlyserialinit(void) void arm_serialinit(void) { - pl011_serialinit(); + #error "Not implemented" } -#ifdef CONFIG_UART_PL011_PLATFORMIF -/*************************************************************************** - * Name: pl011_platform interface - * - * Description: - * see drivers/serial/serial_pl011.c - * pl011_setup - * pl011_shutdown - * - ***************************************************************************/ - -int pl011_platform_setup(uint32_t base) -{ - /* If needed, implement platform specific process such as enabling pl011 - * to reduce power consumption. - */ - - return 0; -} - -int pl011_platform_shutdown(uint32_t base) -{ - /* If needed, implement platform specific process such as disabling pl011 - * to reduce power consumption. - */ - - return 0; -} -#endif /* CONFIG_UART_PL011_PLATFORMIF */ #endif /* USE_SERIALDRIVER */ diff --git a/arch/arm/src/fvp-v8r-aarch32/Kconfig b/arch/arm/src/fvp-v8r-aarch32/Kconfig index 11748da20c2cb..97f89b187e0be 100644 --- a/arch/arm/src/fvp-v8r-aarch32/Kconfig +++ b/arch/arm/src/fvp-v8r-aarch32/Kconfig @@ -19,4 +19,44 @@ endchoice # FVP Chip Selection endmenu # "FVP Chip Selection" +menu "FVP ARMv8-R Peripheral Selection" + +config FVP_ARMV8R_UART0 + bool "UART0" + default n + select UART_PL011 + select UART0_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART0. + +config FVP_ARMV8R_UART1 + bool "UART1" + default y + select UART_PL011 + select UART1_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART1. + +config FVP_ARMV8R_UART2 + bool "UART2" + default n + select UART_PL011 + select UART2_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART2. + +config FVP_ARMV8R_UART3 + bool "UART3" + default n + select UART_PL011 + select UART3_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART3. + +endmenu # FVP ARMv8-R Peripheral Selection + endif # ARCH_CHIP_FVP_ARMV8R_AARCH32 diff --git a/arch/arm/src/fvp-v8r-aarch32/fvp_serial.c b/arch/arm/src/fvp-v8r-aarch32/fvp_serial.c index 1b2861a7af32a..edbb5e5b811b5 100644 --- a/arch/arm/src/fvp-v8r-aarch32/fvp_serial.c +++ b/arch/arm/src/fvp-v8r-aarch32/fvp_serial.c @@ -38,12 +38,187 @@ #include "arm_internal.h" +/*************************************************************************** + * Pre-processor definitions + ***************************************************************************/ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port0 +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port1 +#elif defined(CONFIG_UART2_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port2 +#elif defined(CONFIG_UART3_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port3 +#endif + +/* QEMU-specific configuration parameters */ + +#define UART0_BASEADDR (0x9c090000) +#define UART0_CLK_FREQ (24000000) +#define UART0_IRQ (37) + +#define UART1_BASEADDR (0x9c0a0000) +#define UART1_CLK_FREQ (24000000) +#define UART1_IRQ (38) + +#define UART2_BASEADDR (0x9c0b0000) +#define UART2_CLK_FREQ (24000000) +#define UART2_IRQ (39) + +#define UART3_BASEADDR (0x9c0c0000) +#define UART3_CLK_FREQ (24000000) +#define UART3_IRQ (40) + +/*************************************************************************** + * Private data + ***************************************************************************/ + +#ifdef CONFIG_UART0_SERIALDRIVER +static char g_uart0_rx_buf[CONFIG_UART0_RXBUFSIZE]; +static char g_uart0_tx_buf[CONFIG_UART0_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port0 = +{ + .config = + { + .baseaddr = (void *)UART0_BASEADDR, + .baud_rate = CONFIG_UART0_BAUD, + .irq_num = UART0_IRQ, + .sbsa = false, + .sys_clk_freq = UART0_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart0_rx_buf, + .size = CONFIG_UART0_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart0_tx_buf, + .size = CONFIG_UART0_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER +static char g_uart1_rx_buf[CONFIG_UART1_RXBUFSIZE]; +static char g_uart1_tx_buf[CONFIG_UART1_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port1 = +{ + .config = + { + .baseaddr = (void *)UART1_BASEADDR, + .baud_rate = CONFIG_UART1_BAUD, + .irq_num = UART1_IRQ, + .sbsa = false, + .sys_clk_freq = UART1_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart1_rx_buf, + .size = CONFIG_UART1_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart1_tx_buf, + .size = CONFIG_UART1_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART2_SERIALDRIVER +static char g_uart2_rx_buf[CONFIG_UART2_RXBUFSIZE]; +static char g_uart2_tx_buf[CONFIG_UART2_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port2 = +{ + .config = + { + .baseaddr = (void *)UART2_BASEADDR, + .baud_rate = CONFIG_UART2_BAUD, + .irq_num = UART2_IRQ, + .sbsa = false, + .sys_clk_freq = UART2_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart2_rx_buf, + .size = CONFIG_UART2_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart2_tx_buf, + .size = CONFIG_UART2_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART3_SERIALDRIVER +static char g_uart3_rx_buf[CONFIG_UART3_RXBUFSIZE]; +static char g_uart3_tx_buf[CONFIG_UART3_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port3 = +{ + .config = + { + .baseaddr = (void *)UART3_BASEADDR, + .baud_rate = CONFIG_UART3_BAUD, + .irq_num = UART3_IRQ, + .sbsa = false, + .sys_clk_freq = UART3_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart3_rx_buf, + .size = CONFIG_UART3_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart3_tx_buf, + .size = CONFIG_UART3_TXBUFSIZE, + }, + }, +}; +#endif + #ifdef USE_SERIALDRIVER /*************************************************************************** * Public Functions ***************************************************************************/ +/*************************************************************************** + * Name: up_putc + * + * Description: + * Provide priority, low-level access to support OS debug writes + * + ***************************************************************************/ + +#ifdef CONSOLE_DEV +void up_putc(int ch) +{ + pl011_putc(&CONSOLE_DEV.uart, ch); +} +#endif + /*************************************************************************** * Name: arm_earlyserialinit * @@ -58,8 +233,10 @@ void arm_earlyserialinit(void) * when they are first opened. */ -#ifdef CONFIG_UART_PL011 - pl011_earlyserialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + CONSOLE_DEV.uart.isconsole = true; + CONSOLE_DEV.uart.ops->setup(&CONSOLE_DEV.uart); /* Early set up */ #endif } @@ -73,8 +250,29 @@ void arm_earlyserialinit(void) void arm_serialinit(void) { -#ifdef CONFIG_UART_PL011 - pl011_serialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + uart_register("/dev/console", &CONSOLE_DEV.uart); +#endif + +#ifdef CONFIG_UART0_SERIALDRIVER + pl011_dev_init(&g_pl011_port0); + uart_register("/dev/ttyS0", &g_pl011_port0.uart); +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER + pl011_dev_init(&g_pl011_port1); + uart_register("/dev/ttyS1", &g_pl011_port1.uart); +#endif + +#ifdef CONFIG_UART2_SERIALDRIVER + pl011_dev_init(&g_pl011_port2); + uart_register("/dev/ttyS2", &g_pl011_port2.uart); +#endif + +#ifdef CONFIG_UART3_SERIALDRIVER + pl011_dev_init(&g_pl011_port3); + uart_register("/dev/ttyS3", &g_pl011_port3.uart); #endif } diff --git a/arch/arm/src/goldfish/goldfish_serial.c b/arch/arm/src/goldfish/goldfish_serial.c index d71accc280b95..c4800d43156f7 100644 --- a/arch/arm/src/goldfish/goldfish_serial.c +++ b/arch/arm/src/goldfish/goldfish_serial.c @@ -48,7 +48,7 @@ void arm_earlyserialinit(void) * when they are first opened. */ - pl011_earlyserialinit(); + #error "Not implemented" } /*************************************************************************** @@ -61,7 +61,7 @@ void arm_earlyserialinit(void) void arm_serialinit(void) { - pl011_serialinit(); + #error "Not implemented" } #endif /* CONFIG_UART_PL011 */ diff --git a/arch/arm/src/qemu/Kconfig b/arch/arm/src/qemu/Kconfig index a46b7096605b6..0e6cf57da2452 100644 --- a/arch/arm/src/qemu/Kconfig +++ b/arch/arm/src/qemu/Kconfig @@ -49,5 +49,30 @@ config ARCH_CHIP_QEMU_TRUSTZONE The default is off. And this config can enable/disable TrustZone in qemu chip. +##################################################################### +# UART Configuration +##################################################################### + +menu "QEMU ARMv7A Peripheral Selection" + +config QEMU_UART0 + bool "UART0" + default y + select UART_PL011 + select UART0_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART0. + +config QEMU_UART1 + bool "UART1" + default n + select UART_PL011 + select UART1_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART1. + +endmenu # QEMU ARMv7A Peripheral Selection endif # ARCH_CHIP_QEMU_ARM diff --git a/arch/arm/src/qemu/qemu_serial.c b/arch/arm/src/qemu/qemu_serial.c index c492a6649ce80..67d04e396090c 100644 --- a/arch/arm/src/qemu/qemu_serial.c +++ b/arch/arm/src/qemu/qemu_serial.c @@ -28,12 +28,111 @@ #include "arm_internal.h" -#ifdef CONFIG_UART_PL011 +/*************************************************************************** + * Pre-processor definitions + ***************************************************************************/ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port0 +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port1 +#endif + +/* QEMU-specific configuration parameters */ + +#define UART0_BASEADDR (0x9000000) +#define UART0_CLK_FREQ (24000000) +#define UART0_IRQ (33) + +#define UART1_BASEADDR (0x9040000) +#define UART1_CLK_FREQ (24000000) +#define UART1_IRQ (40) + +/*************************************************************************** + * Private data + ***************************************************************************/ + +#ifdef CONFIG_UART0_SERIALDRIVER +static char g_uart0_rx_buf[CONFIG_UART0_RXBUFSIZE]; +static char g_uart0_tx_buf[CONFIG_UART0_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port0 = +{ + .config = + { + .baseaddr = (void *)UART0_BASEADDR, + .baud_rate = CONFIG_UART0_BAUD, + .irq_num = UART0_IRQ, + .sbsa = false, + .sys_clk_freq = UART0_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart0_rx_buf, + .size = CONFIG_UART0_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart0_tx_buf, + .size = CONFIG_UART0_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER +static char g_uart1_rx_buf[CONFIG_UART1_RXBUFSIZE]; +static char g_uart1_tx_buf[CONFIG_UART1_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port1 = +{ + .config = + { + .baseaddr = (void *)UART1_BASEADDR, + .baud_rate = CONFIG_UART1_BAUD, + .irq_num = UART1_IRQ, + .sbsa = false, + .sys_clk_freq = UART1_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart1_rx_buf, + .size = CONFIG_UART1_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart1_tx_buf, + .size = CONFIG_UART1_TXBUFSIZE, + }, + }, +}; +#endif /*************************************************************************** * Public Functions ***************************************************************************/ +/*************************************************************************** + * Name: up_putc + * + * Description: + * Provide priority, low-level access to support OS debug writes + * + ***************************************************************************/ + +#ifdef CONSOLE_DEV +void up_putc(int ch) +{ + pl011_putc(&CONSOLE_DEV.uart, ch); +} +#endif + /*************************************************************************** * Name: arm_earlyserialinit * @@ -48,7 +147,11 @@ void arm_earlyserialinit(void) * when they are first opened. */ - pl011_earlyserialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + CONSOLE_DEV.uart.isconsole = true; + CONSOLE_DEV.uart.ops->setup(&CONSOLE_DEV.uart); /* Early set up */ +#endif } /*************************************************************************** @@ -61,7 +164,18 @@ void arm_earlyserialinit(void) void arm_serialinit(void) { - pl011_serialinit(); -} +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + uart_register("/dev/console", &CONSOLE_DEV.uart); +#endif + +#ifdef CONFIG_UART0_SERIALDRIVER + pl011_dev_init(&g_pl011_port0); + uart_register("/dev/ttyS0", &g_pl011_port0.uart); +#endif -#endif /* CONFIG_UART_PL011 */ +#ifdef CONFIG_UART1_SERIALDRIVER + pl011_dev_init(&g_pl011_port1); + uart_register("/dev/ttyS1", &g_pl011_port1.uart); +#endif +} diff --git a/arch/arm64/src/fvp-v8r/Kconfig b/arch/arm64/src/fvp-v8r/Kconfig index b26a1b1defe94..8014bae15df08 100644 --- a/arch/arm64/src/fvp-v8r/Kconfig +++ b/arch/arm64/src/fvp-v8r/Kconfig @@ -20,4 +20,48 @@ endchoice # FVP Chip Selection endmenu # "FVP Chip Selection" +##################################################################### +# UART Configuration +##################################################################### + +menu "FVP ARMv8-R Peripheral Selection" + +config FVP_ARMV8R_UART0 + bool "UART0" + default n + select UART_PL011 + select UART0_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART0. + +config FVP_ARMV8R_UART1 + bool "UART1" + default y + select UART_PL011 + select UART1_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART1. + +config FVP_ARMV8R_UART2 + bool "UART2" + default n + select UART_PL011 + select UART2_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART2. + +config FVP_ARMV8R_UART3 + bool "UART3" + default n + select UART_PL011 + select UART3_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART3. + +endmenu # FVP ARMv8-R Peripheral Selection + endif # ARCH_CHIP_FVP_ARMV8R diff --git a/arch/arm64/src/fvp-v8r/fvp_lowputc.S b/arch/arm64/src/fvp-v8r/fvp_lowputc.S index 66da6d898259c..46c15779c11e9 100644 --- a/arch/arm64/src/fvp-v8r/fvp_lowputc.S +++ b/arch/arm64/src/fvp-v8r/fvp_lowputc.S @@ -62,7 +62,7 @@ GTEXT(arm64_earlyprintinit) SECTION_FUNC(text, arm64_earlyprintinit) - ldr x15, =CONFIG_UART0_BASE + ldr x15, =0x9c090000 mov x0, #(7372800 / EARLY_UART_PL011_BAUD_RATE % 16) strh w0, [x15, #0x28] /* -> UARTFBRD (Baud divisor fraction) */ mov x0, #(7372800 / EARLY_UART_PL011_BAUD_RATE / 16) @@ -100,7 +100,7 @@ SECTION_FUNC(text, arm64_earlyprintinit) GTEXT(arm64_lowputc) SECTION_FUNC(text, arm64_lowputc) - ldr x15, =CONFIG_UART0_BASE + ldr x15, =0x9c090000 early_uart_ready x15, w2 early_uart_transmit x15, w0 ret diff --git a/arch/arm64/src/fvp-v8r/fvp_serial.c b/arch/arm64/src/fvp-v8r/fvp_serial.c index e020f0601efd4..2300c304f8218 100644 --- a/arch/arm64/src/fvp-v8r/fvp_serial.c +++ b/arch/arm64/src/fvp-v8r/fvp_serial.c @@ -37,12 +37,187 @@ #include #include "arm64_internal.h" +/*************************************************************************** + * Pre-processor definitions + ***************************************************************************/ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port0 +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port1 +#elif defined(CONFIG_UART2_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port2 +#elif defined(CONFIG_UART3_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port3 +#endif + +/* QEMU-specific configuration parameters */ + +#define UART0_BASEADDR (0x9c090000) +#define UART0_CLK_FREQ (24000000) +#define UART0_IRQ (37) + +#define UART1_BASEADDR (0x9c0a0000) +#define UART1_CLK_FREQ (24000000) +#define UART1_IRQ (38) + +#define UART2_BASEADDR (0x9c0b0000) +#define UART2_CLK_FREQ (24000000) +#define UART2_IRQ (39) + +#define UART3_BASEADDR (0x9c0c0000) +#define UART3_CLK_FREQ (24000000) +#define UART3_IRQ (40) + +/*************************************************************************** + * Private data + ***************************************************************************/ + +#ifdef CONFIG_UART0_SERIALDRIVER +static char g_uart0_rx_buf[CONFIG_UART0_RXBUFSIZE]; +static char g_uart0_tx_buf[CONFIG_UART0_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port0 = +{ + .config = + { + .baseaddr = (void *)UART0_BASEADDR, + .baud_rate = CONFIG_UART0_BAUD, + .irq_num = UART0_IRQ, + .sbsa = false, + .sys_clk_freq = UART0_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart0_rx_buf, + .size = CONFIG_UART0_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart0_tx_buf, + .size = CONFIG_UART0_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER +static char g_uart1_rx_buf[CONFIG_UART1_RXBUFSIZE]; +static char g_uart1_tx_buf[CONFIG_UART1_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port1 = +{ + .config = + { + .baseaddr = (void *)UART1_BASEADDR, + .baud_rate = CONFIG_UART1_BAUD, + .irq_num = UART1_IRQ, + .sbsa = false, + .sys_clk_freq = UART1_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart1_rx_buf, + .size = CONFIG_UART1_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart1_tx_buf, + .size = CONFIG_UART1_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART2_SERIALDRIVER +static char g_uart2_rx_buf[CONFIG_UART2_RXBUFSIZE]; +static char g_uart2_tx_buf[CONFIG_UART2_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port2 = +{ + .config = + { + .baseaddr = (void *)UART2_BASEADDR, + .baud_rate = CONFIG_UART2_BAUD, + .irq_num = UART2_IRQ, + .sbsa = false, + .sys_clk_freq = UART2_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart2_rx_buf, + .size = CONFIG_UART2_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart2_tx_buf, + .size = CONFIG_UART2_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART3_SERIALDRIVER +static char g_uart3_rx_buf[CONFIG_UART3_RXBUFSIZE]; +static char g_uart3_tx_buf[CONFIG_UART3_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port3 = +{ + .config = + { + .baseaddr = (void *)UART3_BASEADDR, + .baud_rate = CONFIG_UART3_BAUD, + .irq_num = UART3_IRQ, + .sbsa = false, + .sys_clk_freq = UART3_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart3_rx_buf, + .size = CONFIG_UART3_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart3_tx_buf, + .size = CONFIG_UART3_TXBUFSIZE, + }, + }, +}; +#endif + #ifdef USE_SERIALDRIVER /*************************************************************************** * Public Functions ***************************************************************************/ +/*************************************************************************** + * Name: up_putc + * + * Description: + * Provide priority, low-level access to support OS debug writes + * + ***************************************************************************/ + +#ifdef CONSOLE_DEV +void up_putc(int ch) +{ + pl011_putc(&CONSOLE_DEV.uart, ch); +} +#endif + /*************************************************************************** * Name: arm64_earlyserialinit * @@ -57,7 +232,11 @@ void arm64_earlyserialinit(void) * when they are first opened. */ - pl011_earlyserialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + CONSOLE_DEV.uart.isconsole = true; + CONSOLE_DEV.uart.ops->setup(&CONSOLE_DEV.uart); /* Early set up */ +#endif } /*************************************************************************** @@ -70,7 +249,30 @@ void arm64_earlyserialinit(void) void arm64_serialinit(void) { - pl011_serialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + uart_register("/dev/console", &CONSOLE_DEV.uart); +#endif + +#ifdef CONFIG_UART0_SERIALDRIVER + pl011_dev_init(&g_pl011_port0); + uart_register("/dev/ttyS0", &g_pl011_port0.uart); +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER + pl011_dev_init(&g_pl011_port1); + uart_register("/dev/ttyS1", &g_pl011_port1.uart); +#endif + +#ifdef CONFIG_UART2_SERIALDRIVER + pl011_dev_init(&g_pl011_port2); + uart_register("/dev/ttyS2", &g_pl011_port2.uart); +#endif + +#ifdef CONFIG_UART3_SERIALDRIVER + pl011_dev_init(&g_pl011_port3); + uart_register("/dev/ttyS3", &g_pl011_port3.uart); +#endif } #endif /* USE_SERIALDRIVER */ diff --git a/arch/arm64/src/goldfish/goldfish_serial.c b/arch/arm64/src/goldfish/goldfish_serial.c index 002989f07e4e5..bd1cab073ca43 100644 --- a/arch/arm64/src/goldfish/goldfish_serial.c +++ b/arch/arm64/src/goldfish/goldfish_serial.c @@ -57,7 +57,7 @@ void arm64_earlyserialinit(void) * when they are first opened. */ - pl011_earlyserialinit(); + #error "Not implemented" } /*************************************************************************** @@ -70,7 +70,7 @@ void arm64_earlyserialinit(void) void arm64_serialinit(void) { - pl011_serialinit(); + #error "Not implemented" } #endif /* USE_SERIALDRIVER */ diff --git a/arch/arm64/src/qemu/Kconfig b/arch/arm64/src/qemu/Kconfig index 668b9c564d930..95dc6b796c000 100644 --- a/arch/arm64/src/qemu/Kconfig +++ b/arch/arm64/src/qemu/Kconfig @@ -47,4 +47,30 @@ config ARCH_CHIP_QEMU_WITH_HV endmenu # "Qemu Chip Selection" +##################################################################### +# UART Configuration +##################################################################### + +menu "QEMU ARMv8A Peripheral Selection" + +config QEMU_UART0 + bool "UART0" + default y + select UART_PL011 + select UART0_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART0. + +config QEMU_UART1 + bool "UART1" + default n + select UART_PL011 + select UART1_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Select to enable support for UART1. + +endmenu # QEMU ARMv8A Peripheral Selection + endif # ARCH_CHIP_QEMU diff --git a/arch/arm64/src/qemu/qemu_serial.c b/arch/arm64/src/qemu/qemu_serial.c index 8677386f6910c..006ec7e8b385e 100644 --- a/arch/arm64/src/qemu/qemu_serial.c +++ b/arch/arm64/src/qemu/qemu_serial.c @@ -37,11 +37,113 @@ #include #include "arm64_internal.h" -#ifdef USE_SERIALDRIVER +/*************************************************************************** + * Pre-processor definitions + ***************************************************************************/ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port0 +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) + #define CONSOLE_DEV g_pl011_port1 +#endif + +/* QEMU-specific configuration parameters */ + +#define UART0_BASEADDR (0x9000000) +#define UART0_CLK_FREQ (24000000) +#define UART0_IRQ (33) + +#define UART1_BASEADDR (0x9040000) +#define UART1_CLK_FREQ (24000000) +#define UART1_IRQ (40) + +/*************************************************************************** + * Private data + ***************************************************************************/ + +#ifdef CONFIG_UART0_SERIALDRIVER +static char g_uart0_rx_buf[CONFIG_UART0_RXBUFSIZE]; +static char g_uart0_tx_buf[CONFIG_UART0_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port0 = +{ + .config = + { + .baseaddr = (void *)UART0_BASEADDR, + .baud_rate = CONFIG_UART0_BAUD, + .irq_num = UART0_IRQ, + .sbsa = false, + .sys_clk_freq = UART0_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart0_rx_buf, + .size = CONFIG_UART0_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart0_tx_buf, + .size = CONFIG_UART0_TXBUFSIZE, + }, + }, +}; +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER +static char g_uart1_rx_buf[CONFIG_UART1_RXBUFSIZE]; +static char g_uart1_tx_buf[CONFIG_UART1_TXBUFSIZE]; + +static struct pl011_uart_port_s g_pl011_port1 = +{ + .config = + { + .baseaddr = (void *)UART1_BASEADDR, + .baud_rate = CONFIG_UART1_BAUD, + .irq_num = UART1_IRQ, + .sbsa = false, + .sys_clk_freq = UART1_CLK_FREQ, + }, + + .uart = + { + .recv = + { + .buffer = g_uart1_rx_buf, + .size = CONFIG_UART1_RXBUFSIZE, + }, + .xmit = + { + .buffer = g_uart1_tx_buf, + .size = CONFIG_UART1_TXBUFSIZE, + }, + }, +}; +#endif + /*************************************************************************** * Public Functions ***************************************************************************/ +/*************************************************************************** + * Name: up_putc + * + * Description: + * Provide priority, low-level access to support OS debug writes + * + ***************************************************************************/ + +#ifdef CONSOLE_DEV +void up_putc(int ch) +{ + pl011_putc(&CONSOLE_DEV.uart, ch); +} +#endif + +#ifdef USE_SERIALDRIVER + /*************************************************************************** * Name: arm64_earlyserialinit * @@ -56,7 +158,11 @@ void arm64_earlyserialinit(void) * when they are first opened. */ - pl011_earlyserialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + CONSOLE_DEV.uart.isconsole = true; + CONSOLE_DEV.uart.ops->setup(&CONSOLE_DEV.uart); /* Early set up */ +#endif } /*************************************************************************** @@ -69,7 +175,20 @@ void arm64_earlyserialinit(void) void arm64_serialinit(void) { - pl011_serialinit(); +#ifdef CONSOLE_DEV + pl011_dev_init(&CONSOLE_DEV); + uart_register("/dev/console", &CONSOLE_DEV.uart); +#endif + +#ifdef CONFIG_UART0_SERIALDRIVER + pl011_dev_init(&g_pl011_port0); + uart_register("/dev/ttyS0", &g_pl011_port0.uart); +#endif + +#ifdef CONFIG_UART1_SERIALDRIVER + pl011_dev_init(&g_pl011_port1); + uart_register("/dev/ttyS1", &g_pl011_port1.uart); +#endif } #endif /* USE_SERIALDRIVER */ diff --git a/boards/arm/fvp-v8r-aarch32/fvp-armv8r-aarch32/configs/nsh/defconfig b/boards/arm/fvp-v8r-aarch32/fvp-armv8r-aarch32/configs/nsh/defconfig index d99e9b33ec3cf..a1da910676a93 100644 --- a/boards/arm/fvp-v8r-aarch32/fvp-armv8r-aarch32/configs/nsh/defconfig +++ b/boards/arm/fvp-v8r-aarch32/fvp-armv8r-aarch32/configs/nsh/defconfig @@ -24,6 +24,9 @@ CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_TASK_STACKSIZE=8192 CONFIG_EXAMPLES_HELLO=y CONFIG_EXPERIMENTAL=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_ROMFS=y @@ -55,18 +58,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/qemu/qemu-armv7a/configs/full/defconfig b/boards/arm/qemu/qemu-armv7a/configs/full/defconfig index 72e72c33c470d..bb281d0325854 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/full/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/full/defconfig @@ -139,11 +139,7 @@ CONFIG_TESTING_OSTEST=y CONFIG_TIMER_FD=y CONFIG_TLS_NELEM=16 CONFIG_TLS_TASK_NELEM=16 -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_UINPUT_KEYBOARD=y CONFIG_USBHOST=y CONFIG_USBHOST_HIDMOUSE=y diff --git a/boards/arm/qemu/qemu-armv7a/configs/gdbstub/defconfig b/boards/arm/qemu/qemu-armv7a/configs/gdbstub/defconfig index 197c37571e303..3c0e2426e4097 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/gdbstub/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/gdbstub/defconfig @@ -44,6 +44,7 @@ CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_READLINE=y CONFIG_PREALLOC_TIMERS=4 +CONFIG_QEMU_UART1=y CONFIG_RAMLOG=y CONFIG_RAM_SIZE=132120576 CONFIG_RAM_START=0x40200000 @@ -64,12 +65,5 @@ CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_SYSTEM=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART0_BASE=0x9000000 -CONFIG_UART0_IRQ=33 -CONFIG_UART0_PL011=y CONFIG_UART0_SERIAL_CONSOLE=y -CONFIG_UART1_BASE=0x9040000 -CONFIG_UART1_IRQ=40 -CONFIG_UART1_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/qemu/qemu-armv7a/configs/knsh/defconfig b/boards/arm/qemu/qemu-armv7a/configs/knsh/defconfig index 18b086834cf36..cdafd2960f50c 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/knsh/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/knsh/defconfig @@ -85,9 +85,5 @@ CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH_PROGNAME="init" CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/qemu/qemu-armv7a/configs/knsh_smp/defconfig b/boards/arm/qemu/qemu-armv7a/configs/knsh_smp/defconfig index 40de9786bc436..6b9428d70484c 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/knsh_smp/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/knsh_smp/defconfig @@ -86,9 +86,5 @@ CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH_PROGNAME="init" CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/qemu/qemu-armv7a/configs/nsh/defconfig b/boards/arm/qemu/qemu-armv7a/configs/nsh/defconfig index 425d4c9ca3ddb..8c7a3e4d715a5 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/nsh/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/nsh/defconfig @@ -65,9 +65,5 @@ CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_SYSTEM=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/qemu/qemu-armv7a/configs/rpproxy/defconfig b/boards/arm/qemu/qemu-armv7a/configs/rpproxy/defconfig index f387ad8f73db7..deb87deb9b323 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/rpproxy/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/rpproxy/defconfig @@ -123,8 +123,4 @@ CONFIG_SYSLOG_TIMESTAMP=y CONFIG_SYSTEM_CUTERM=y CONFIG_SYSTEM_DUMPSTACK=y CONFIG_SYSTEM_NSH=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm/qemu/qemu-armv7a/configs/rpserver/defconfig b/boards/arm/qemu/qemu-armv7a/configs/rpserver/defconfig index 91551876a521e..4da239bc4b6e5 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/rpserver/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/rpserver/defconfig @@ -126,8 +126,4 @@ CONFIG_SYSTEM_NSH=y CONFIG_TTY_LAUNCH=y CONFIG_TTY_LAUNCH_STACKSIZE=2048 CONFIG_TTY_SIGINT=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm/qemu/qemu-armv7a/configs/smp/defconfig b/boards/arm/qemu/qemu-armv7a/configs/smp/defconfig index e361061edaaa7..4a2a5ee1f969b 100644 --- a/boards/arm/qemu/qemu-armv7a/configs/smp/defconfig +++ b/boards/arm/qemu/qemu-armv7a/configs/smp/defconfig @@ -62,9 +62,5 @@ CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_KASAN=y CONFIG_TESTING_OSTEST=y CONFIG_TLS_ALIGNED=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest/defconfig b/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest/defconfig index 1b3f233182063..3f6116880abe5 100644 --- a/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest/defconfig +++ b/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest/defconfig @@ -27,6 +27,9 @@ CONFIG_EXAMPLES_HELLO=y CONFIG_EXPERIMENTAL=y CONFIG_FS_PROCFS=y CONFIG_FS_ROMFS=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_HRTIMER=y CONFIG_HRTIMER_LIST=y CONFIG_IDLETHREAD_STACKSIZE=8192 @@ -57,18 +60,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest_smp/defconfig b/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest_smp/defconfig index d9c9cc00e0f58..601b63601599b 100644 --- a/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest_smp/defconfig +++ b/boards/arm64/fvp-v8r/fvp-armv8r/configs/citest_smp/defconfig @@ -27,6 +27,9 @@ CONFIG_EXAMPLES_HELLO=y CONFIG_EXPERIMENTAL=y CONFIG_FS_PROCFS=y CONFIG_FS_ROMFS=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_IDLETHREAD_STACKSIZE=8192 CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_INTELHEX_BINARY=y @@ -58,18 +61,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_SMP=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh/defconfig b/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh/defconfig index df3fac0fde64d..5a8581a364683 100644 --- a/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh/defconfig +++ b/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh/defconfig @@ -29,6 +29,9 @@ CONFIG_EXPERIMENTAL=y CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_ROMFS=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_IDLETHREAD_STACKSIZE=8192 CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_INTELHEX_BINARY=y @@ -57,18 +60,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh_smp/defconfig b/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh_smp/defconfig index ca05a63b0735c..934a31d021a29 100644 --- a/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh_smp/defconfig +++ b/boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh_smp/defconfig @@ -29,6 +29,9 @@ CONFIG_EXPERIMENTAL=y CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_ROMFS=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_IDLETHREAD_STACKSIZE=8192 CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_INTELHEX_BINARY=y @@ -60,18 +63,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_SMP=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh/defconfig b/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh/defconfig index 9e59d24629aed..b12ce47bf462a 100644 --- a/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh/defconfig +++ b/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh/defconfig @@ -34,6 +34,9 @@ CONFIG_EXPERIMENTAL=y CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_ROMFS=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_IDLETHREAD_STACKSIZE=8192 CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_INTELHEX_BINARY=y @@ -67,18 +70,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh_smp/defconfig b/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh_smp/defconfig index 116ccd08d7c02..c28853f3fb753 100644 --- a/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh_smp/defconfig +++ b/boards/arm64/fvp-v8r/fvp-armv8r/configs/pnsh_smp/defconfig @@ -34,6 +34,9 @@ CONFIG_EXPERIMENTAL=y CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_ROMFS=y +CONFIG_FVP_ARMV8R_UART0=y +CONFIG_FVP_ARMV8R_UART2=y +CONFIG_FVP_ARMV8R_UART3=y CONFIG_IDLETHREAD_STACKSIZE=8192 CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_INTELHEX_BINARY=y @@ -70,18 +73,5 @@ CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y CONFIG_TESTING_SMP=y -CONFIG_UART0_BASE=0x9c090000 -CONFIG_UART0_IRQ=37 -CONFIG_UART0_PL011=y -CONFIG_UART1_BASE=0x9c0a0000 -CONFIG_UART1_IRQ=38 -CONFIG_UART1_PL011=y CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART2_BASE=0x9c0b0000 -CONFIG_UART2_IRQ=39 -CONFIG_UART2_PL011=y -CONFIG_UART3_BASE=0x9c0c0000 -CONFIG_UART3_IRQ=40 -CONFIG_UART3_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/citest/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/citest/defconfig index 66c8a52ae9478..941917ea91c21 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/citest/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/citest/defconfig @@ -60,9 +60,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_KASAN=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/citest_smp/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/citest_smp/defconfig index 19889d26648e6..b694769a8ce4d 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/citest_smp/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/citest_smp/defconfig @@ -58,9 +58,5 @@ CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_OSTEST_STACKSIZE=16384 CONFIG_TESTING_SMP=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/fastboot/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/fastboot/defconfig index 3b84dbcab3db5..7a3da4c8c40d7 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/fastboot/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/fastboot/defconfig @@ -105,9 +105,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_V9FS_VIRTIO_9P=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/fb/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/fb/defconfig index f9a11164c19a3..d877b214ea0e5 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/fb/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/fb/defconfig @@ -72,9 +72,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_VIDEO_FB=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig index 93a62e7025c79..67f17bf3aa86d 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig @@ -51,6 +51,7 @@ CONFIG_PREALLOC_TIMERS=4 CONFIG_PROFILE_ALL=y CONFIG_PROFILE_MINI=y CONFIG_PTHREAD_STACK_MIN=8192 +CONFIG_QEMU_UART1=y CONFIG_RAMLOG=y CONFIG_RAM_SIZE=134217728 CONFIG_RAM_START=0x40000000 @@ -72,12 +73,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART0_BASE=0x9000000 -CONFIG_UART0_IRQ=33 -CONFIG_UART0_PL011=y CONFIG_UART0_SERIAL_CONSOLE=y -CONFIG_UART1_BASE=0x9040000 -CONFIG_UART1_IRQ=40 -CONFIG_UART1_PL011=y -CONFIG_UART_PL011=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/knsh/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/knsh/defconfig index 20f9f27d3fd89..360abb1bb7d17 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/knsh/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/knsh/defconfig @@ -100,9 +100,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/mte/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/mte/defconfig index f44759c8ea678..6753beb3de185 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/mte/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/mte/defconfig @@ -68,9 +68,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/netnsh/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/netnsh/defconfig index 34e9281a5155f..fa0af0aa369d6 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/netnsh/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/netnsh/defconfig @@ -109,9 +109,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_V9FS_VIRTIO_9P=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/netnsh_hv/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/netnsh_hv/defconfig index 7f687ee47d376..d6ce5b9d84949 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/netnsh_hv/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/netnsh_hv/defconfig @@ -100,8 +100,4 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp/defconfig index 7ed8642c99ac8..05a55554c8aef 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp/defconfig @@ -100,8 +100,4 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_SMP=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp_hv/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp_hv/defconfig index 755ebe35b3e97..cc07c6c3610e0 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp_hv/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp_hv/defconfig @@ -101,8 +101,4 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_SMP=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/nsh/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/nsh/defconfig index 9a11093c1e97f..3c6424223a3d5 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/nsh/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/nsh/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +# CONFIG_STANDARD_SERIAL is not set CONFIG_ARCH="arm64" CONFIG_ARCH_ARM64=y CONFIG_ARCH_BOARD="qemu-armv8a" @@ -68,9 +69,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/nsh_fiq/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/nsh_fiq/defconfig index 8ba76bdfa43f3..67fd10cd10999 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/nsh_fiq/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/nsh_fiq/defconfig @@ -63,9 +63,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig index a5ae5397910f9..37a3ef1990d1a 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig @@ -58,9 +58,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig index 813e8aa0e4fa3..2fbaec406db12 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig @@ -76,9 +76,5 @@ CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_OSTEST_STACKSIZE=16384 CONFIG_TESTING_SMP=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp_tickless/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp_tickless/defconfig index 2bf39e46812a0..5b3ddd20fe0f3 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp_tickless/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/nsh_smp_tickless/defconfig @@ -58,9 +58,5 @@ CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_OSTEST_STACKSIZE=16384 CONFIG_TESTING_SMP=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/rpproxy/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/rpproxy/defconfig index 3189faed2ff9a..189ce829bcbe4 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/rpproxy/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/rpproxy/defconfig @@ -111,8 +111,4 @@ CONFIG_SYSTEM_CUTERM=y CONFIG_SYSTEM_DUMPSTACK=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_TIME64=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/rpserver/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/rpserver/defconfig index 2516372d31ef0..08aa3dc0abc75 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/rpserver/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/rpserver/defconfig @@ -112,8 +112,4 @@ CONFIG_SYSTEM_CUTERM_DEFAULT_DEVICE="/dev/ttyproxy" CONFIG_SYSTEM_DUMPSTACK=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_TIME64=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm64/qemu/qemu-armv8a/configs/sotest/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/sotest/defconfig index 48c18d5210b0b..0b82d7802f4df 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/sotest/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/sotest/defconfig @@ -71,9 +71,5 @@ CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/sw_tags/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/sw_tags/defconfig index 984fb0fc8643c..c0a2b32759365 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/sw_tags/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/sw_tags/defconfig @@ -66,9 +66,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_KASAN=y CONFIG_TESTING_OSTEST=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm64/qemu/qemu-armv8a/configs/xedge_demo/defconfig b/boards/arm64/qemu/qemu-armv8a/configs/xedge_demo/defconfig index 68c4633b1d4eb..d38f5a82379ed 100644 --- a/boards/arm64/qemu/qemu-armv8a/configs/xedge_demo/defconfig +++ b/boards/arm64/qemu/qemu-armv8a/configs/xedge_demo/defconfig @@ -110,9 +110,5 @@ CONFIG_SYSTEM_TIME64=y CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_SMP=y -CONFIG_UART1_BASE=0x9000000 -CONFIG_UART1_IRQ=33 -CONFIG_UART1_PL011=y -CONFIG_UART1_SERIAL_CONSOLE=y -CONFIG_UART_PL011=y +CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_V9FS_VIRTIO_9P=y diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index ece1ba5bc5f34..2ccadc2b74d93 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -110,10 +110,6 @@ menuconfig UART_PL011 bool "PL011 Chip support" default n -if UART_PL011 -source "drivers/serial/Kconfig-pl011" -endif - menuconfig UART_XLNXPS bool "Xilinx UART Peripheral System (XUARTPS) Chip support" default n diff --git a/drivers/serial/Kconfig-pl011 b/drivers/serial/Kconfig-pl011 deleted file mode 100644 index 969fdebb8720e..0000000000000 --- a/drivers/serial/Kconfig-pl011 +++ /dev/null @@ -1,88 +0,0 @@ -# -# For a description of the syntax of this configuration file, -# see the file kconfig-language.txt in the NuttX tools repository. -# - -if UART_PL011 - -config UART0_PL011 - bool "UART0 PL011" - select UART0_SERIALDRIVER - default n - -if UART0_PL011 - -config UART0_BASE - hex "UART0 base address" - -config UART0_IRQ - int "PL011 UART0 IRQ number" - -config UART0_CLK_FREQ - int "PL011 UART0 clock frequency" - default 24000000 - -endif # UART0_PL011 - -config UART1_PL011 - bool "UART1 PL011" - select UART1_SERIALDRIVER - default n - -if UART1_PL011 - -config UART1_BASE - hex "UART1 base address" - -config UART1_IRQ - int "PL011 UART1 IRQ number" - -config UART1_CLK_FREQ - int "PL011 UART1 clock frequency" - default 24000000 - -endif # UART1_PL011 - -config UART2_PL011 - bool "UART2 PL011" - select UART2_SERIALDRIVER - default n - -if UART2_PL011 - -config UART2_BASE - hex "UART2 base address" - -config UART2_IRQ - int "PL011 UART2 IRQ number" - -config UART2_CLK_FREQ - int "PL011 UART2 clock frequency" - default 24000000 - -endif # UART2_PL011 - -config UART3_PL011 - bool "UART3 PL011" - select UART3_SERIALDRIVER - default n - -if UART3_PL011 - -config UART3_BASE - hex "UART3 base address" - -config UART3_IRQ - int "PL011 UART3 IRQ number" - -config UART3_CLK_FREQ - int "PL011 UART3 clock frequency" - default 24000000 - -endif # UART3_PL011 - -config UART_PL011_PLATFORMIF - bool "PL011 platform interface" - default n - -endif # UART_PL011 diff --git a/drivers/serial/uart_pl011.c b/drivers/serial/uart_pl011.c index 5246ba619f235..9482ce5e917d5 100644 --- a/drivers/serial/uart_pl011.c +++ b/drivers/serial/uart_pl011.c @@ -47,6 +47,7 @@ #include #include #include +#include #ifdef CONFIG_UART_PL011 @@ -54,25 +55,6 @@ * Pre-processor Definitions ***************************************************************************/ -/* Which UART with be tty0/console and which tty1-4? The console will - * always be ttyS0. If there is no console then will use the lowest - * numbered UART. - */ - -/* First pick the console and ttys0. This could be any of UART1-5 */ - -#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_UART0_PL011) -# define HAVE_PL011_CONSOLE 1 -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_UART1_PL011) -# define HAVE_PL011_CONSOLE 1 -#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_UART2_PL011) -# define HAVE_PL011_CONSOLE 1 -#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_UART3_PL011) -# define HAVE_PL011_CONSOLE 1 -#else -# undef HAVE_PL011_CONSOLE 1 -#endif - #define PL011_BIT_MASK(x, y) (((2 << (x)) - 1) << (y)) /* PL011 Uart Flags Register */ @@ -209,28 +191,6 @@ struct pl011_regs uint32_t dmacr; }; -struct pl011_config -{ - FAR volatile struct pl011_regs *uart; - uint32_t sys_clk_freq; -}; - -/* Device data structure */ - -struct pl011_data -{ - uint32_t baud_rate; - bool sbsa; -}; - -struct pl011_uart_port_s -{ - struct pl011_data data; - struct pl011_config config; - unsigned int irq_num; - spinlock_t lock; -}; - static int pl011_setup(FAR struct uart_dev_s *dev); static void pl011_shutdown(FAR struct uart_dev_s *dev); static int pl011_attach(FAR struct uart_dev_s *dev); @@ -270,227 +230,6 @@ static const struct uart_ops_s g_uart_ops = .txempty = pl011_txempty, }; -/* I/O buffers */ - -#ifdef CONFIG_UART0_PL011 -static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE]; -static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE]; -#endif -#ifdef CONFIG_UART1_PL011 -static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE]; -static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE]; -#endif -#ifdef CONFIG_UART2_PL011 -static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE]; -static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE]; -#endif -#ifdef CONFIG_UART3_PL011 -static char g_uart3rxbuffer[CONFIG_UART3_RXBUFSIZE]; -static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE]; -#endif - -/* This describes the state of the uart0 port. */ - -#ifdef CONFIG_UART0_PL011 - -static struct pl011_uart_port_s g_uart0priv = -{ - .data = - { - .baud_rate = CONFIG_UART0_BAUD, - .sbsa = false, - }, - - .config = - { - .uart = (FAR volatile struct pl011_regs *)CONFIG_UART0_BASE, - .sys_clk_freq = CONFIG_UART0_CLK_FREQ, - }, - - .irq_num = CONFIG_UART0_IRQ, - .lock = SP_UNLOCKED, -}; - -/* I/O buffers */ - -static struct uart_dev_s g_uart0port = -{ - .recv = - { - .size = CONFIG_UART0_RXBUFSIZE, - .buffer = g_uart0rxbuffer, - }, - - .xmit = - { - .size = CONFIG_UART0_TXBUFSIZE, - .buffer = g_uart0txbuffer, - }, - - .ops = &g_uart_ops, - .priv = &g_uart0priv, -}; - -#endif /* CONFIG_UART0_PL011 */ - -/* This describes the state of the uart1 port. */ - -#ifdef CONFIG_UART1_PL011 - -static struct pl011_uart_port_s g_uart1priv = -{ - .data = - { - .baud_rate = CONFIG_UART1_BAUD, - .sbsa = false, - }, - - .config = - { - .uart = (FAR volatile struct pl011_regs *)CONFIG_UART1_BASE, - .sys_clk_freq = CONFIG_UART1_CLK_FREQ, - }, - - .irq_num = CONFIG_UART1_IRQ, - .lock = SP_UNLOCKED, -}; - -/* I/O buffers */ - -static struct uart_dev_s g_uart1port = -{ - .recv = - { - .size = CONFIG_UART1_RXBUFSIZE, - .buffer = g_uart1rxbuffer, - }, - - .xmit = - { - .size = CONFIG_UART1_TXBUFSIZE, - .buffer = g_uart1txbuffer, - }, - - .ops = &g_uart_ops, - .priv = &g_uart1priv, -}; - -#endif /* CONFIG_UART1_PL011 */ - -/* This describes the state of the uart2 port. */ - -#ifdef CONFIG_UART2_PL011 - -static struct pl011_uart_port_s g_uart2priv = -{ - .data = - { - .baud_rate = CONFIG_UART2_BAUD, - .sbsa = false, - }, - - .config = - { - .uart = (FAR volatile struct pl011_regs *)CONFIG_UART2_BASE, - .sys_clk_freq = CONFIG_UART2_CLK_FREQ, - }, - - .irq_num = CONFIG_UART2_IRQ, - .lock = SP_UNLOCKED, -}; - -/* I/O buffers */ - -static struct uart_dev_s g_uart2port = -{ - .recv = - { - .size = CONFIG_UART2_RXBUFSIZE, - .buffer = g_uart2rxbuffer, - }, - - .xmit = - { - .size = CONFIG_UART2_TXBUFSIZE, - .buffer = g_uart2txbuffer, - }, - - .ops = &g_uart_ops, - .priv = &g_uart2priv, -}; - -#endif /* CONFIG_UART2_PL011 */ - -/* This describes the state of the uart3 port. */ - -#ifdef CONFIG_UART3_PL011 - -static struct pl011_uart_port_s g_uart3priv = -{ - .data = - { - .baud_rate = CONFIG_UART3_BAUD, - .sbsa = false, - }, - - .config = - { - .uart = (FAR volatile struct pl011_regs *)CONFIG_UART3_BASE, - .sys_clk_freq = CONFIG_UART3_CLK_FREQ, - }, - - .irq_num = CONFIG_UART3_IRQ, - .lock = SP_UNLOCKED, -}; - -/* I/O buffers */ - -static struct uart_dev_s g_uart3port = -{ - .recv = - { - .size = CONFIG_UART3_RXBUFSIZE, - .buffer = g_uart3rxbuffer, - }, - - .xmit = - { - .size = CONFIG_UART3_TXBUFSIZE, - .buffer = g_uart3txbuffer, - }, - - .ops = &g_uart_ops, - .priv = &g_uart3priv, -}; - -#endif /* CONFIG_UART3_PL011 */ - -#if defined(CONFIG_UART0_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart0port /* UART0 is console */ -#elif defined(CONFIG_UART1_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart1port /* UART1 is console */ -#elif defined(CONFIG_UART2_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart2port /* UART2 is console */ -#elif defined(CONFIG_UART3_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart3port /* UART3 is console */ -#endif - -#ifdef CONFIG_UART0_PL011 -# define TTYS0_DEV g_uart0port -#endif - -#ifdef CONFIG_UART1_PL011 -# define TTYS1_DEV g_uart1port -#endif - -#ifdef CONFIG_UART2_PL011 -# define TTYS2_DEV g_uart2port -#endif - -#ifdef CONFIG_UART3_PL011 -# define TTYS3_DEV g_uart3port -#endif - /*************************************************************************** * Private Functions ***************************************************************************/ @@ -499,28 +238,28 @@ static void pl011_enable(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->cr |= PL011_CR_UARTEN; + config->baseaddr->cr |= PL011_CR_UARTEN; } static void pl011_disable(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->cr &= ~PL011_CR_UARTEN; + config->baseaddr->cr &= ~PL011_CR_UARTEN; } static void pl011_enable_fifo(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->lcr_h |= PL011_LCRH_FEN; + config->baseaddr->lcr_h |= PL011_LCRH_FEN; } static void pl011_disable_fifo(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->lcr_h &= ~PL011_LCRH_FEN; + config->baseaddr->lcr_h &= ~PL011_LCRH_FEN; } static int pl011_set_baudrate(FAR const struct pl011_uart_port_s *sport, @@ -544,15 +283,15 @@ static int pl011_set_baudrate(FAR const struct pl011_uart_port_s *sport, return -EINVAL; } - config->uart->ibrd = bauddiv >> PL011_FBRD_WIDTH; - config->uart->fbrd = bauddiv & ((1U << PL011_FBRD_WIDTH) - 1U); + config->baseaddr->ibrd = bauddiv >> PL011_FBRD_WIDTH; + config->baseaddr->fbrd = bauddiv & ((1U << PL011_FBRD_WIDTH) - 1U); /* In order to internally update the contents of ibrd or fbrd, a * lcr_h write must always be performed at the end * ARM DDI 0183F, Pg 3-13 */ - config->uart->lcr_h = config->uart->lcr_h; + config->baseaddr->lcr_h = config->baseaddr->lcr_h; return 0; } @@ -561,28 +300,28 @@ static void pl011_irq_tx_enable(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->imsc |= PL011_IMSC_TXIM; + config->baseaddr->imsc |= PL011_IMSC_TXIM; } static void pl011_irq_tx_disable(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->imsc &= ~PL011_IMSC_TXIM; + config->baseaddr->imsc &= ~PL011_IMSC_TXIM; } static void pl011_irq_rx_enable(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->imsc |= PL011_IMSC_RXIM | PL011_IMSC_RTIM; + config->baseaddr->imsc |= PL011_IMSC_RXIM | PL011_IMSC_RTIM; } static void pl011_irq_rx_disable(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - config->uart->imsc &= ~(PL011_IMSC_RXIM | PL011_IMSC_RTIM); + config->baseaddr->imsc &= ~(PL011_IMSC_RXIM | PL011_IMSC_RTIM); } static int pl011_irq_tx_complete(FAR const struct pl011_uart_port_s *sport) @@ -591,35 +330,33 @@ static int pl011_irq_tx_complete(FAR const struct pl011_uart_port_s *sport) /* check for TX FIFO empty */ - return config->uart->fr & PL011_FR_TXFE; + return config->baseaddr->fr & PL011_FR_TXFE; } static int pl011_irq_tx_ready(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - FAR const struct pl011_data *data = &sport->data; - if (!data->sbsa && !(config->uart->cr & PL011_CR_TXE)) + if (!config->sbsa && !(config->baseaddr->cr & PL011_CR_TXE)) { return false; } - return (config->uart->imsc & PL011_IMSC_TXIM) && - (!(config->uart->fr & PL011_FR_TXFF)); + return (config->baseaddr->imsc & PL011_IMSC_TXIM) && + (!(config->baseaddr->fr & PL011_FR_TXFF)); } static int pl011_irq_rx_ready(FAR const struct pl011_uart_port_s *sport) { FAR const struct pl011_config *config = &sport->config; - FAR const struct pl011_data *data = &sport->data; - if (!data->sbsa && !(config->uart->cr & PL011_CR_RXE)) + if (!config->sbsa && !(config->baseaddr->cr & PL011_CR_RXE)) { return false; } - return (config->uart->imsc & PL011_IMSC_RXIM) && - (!(config->uart->fr & PL011_FR_RXFE)); + return (config->baseaddr->imsc & PL011_IMSC_RXIM) && + (!(config->baseaddr->fr & PL011_FR_RXFE)); } /*************************************************************************** @@ -637,7 +374,7 @@ static bool pl011_txready(FAR struct uart_dev_s *dev) /* check for TX FIFO not full */ - return ((config->uart->fr & PL011_FR_TXFF) == 0); + return ((config->baseaddr->fr & PL011_FR_TXFF) == 0); } /*************************************************************************** @@ -670,10 +407,10 @@ static void pl011_send(FAR struct uart_dev_s *dev, int ch) while (!pl011_txready(dev)); - config->uart->dr = ch; + config->baseaddr->dr = ch; } -static void pl011_putc(struct uart_dev_s *dev, int ch) +void pl011_putc(struct uart_dev_s *dev, int ch) { FAR struct pl011_uart_port_s *sport = dev->priv; irqstate_t flags; @@ -696,16 +433,15 @@ static bool pl011_rxavailable(FAR struct uart_dev_s *dev) { FAR struct pl011_uart_port_s *sport = dev->priv; FAR const struct pl011_config *config = &sport->config; - FAR struct pl011_data *data = &sport->data; - if (!data->sbsa && - (!(config->uart->cr & PL011_CR_UARTEN) || - !(config->uart->cr & PL011_CR_RXE))) + if (!config->sbsa && + (!(config->baseaddr->cr & PL011_CR_UARTEN) || + !(config->baseaddr->cr & PL011_CR_RXE))) { return false; } - return (config->uart->fr & PL011_FR_RXFE) == 0U; + return (config->baseaddr->fr & PL011_FR_RXFE) == 0U; } /*************************************************************************** @@ -776,7 +512,7 @@ static int pl011_receive(FAR struct uart_dev_s *dev, FAR const struct pl011_config *config = &sport->config; unsigned int rx; - rx = config->uart->dr; + rx = config->baseaddr->dr; *status = rx & 0xf00; @@ -859,8 +595,8 @@ static void pl011_detach(FAR struct uart_dev_s *dev) { FAR struct pl011_uart_port_s *sport = dev->priv; - up_disable_irq(sport->irq_num); - irq_detach(sport->irq_num); + up_disable_irq(sport->config.irq_num); + irq_detach(sport->config.irq_num); } /*************************************************************************** @@ -883,24 +619,22 @@ static void pl011_detach(FAR struct uart_dev_s *dev) static int pl011_attach(FAR struct uart_dev_s *dev) { FAR struct pl011_uart_port_s *sport; - FAR struct pl011_data *data; int ret; sport = dev->priv; - data = &sport->data; - ret = irq_attach(sport->irq_num, pl011_irq_handler, dev); + ret = irq_attach(sport->config.irq_num, pl011_irq_handler, dev); if (ret == OK) { - up_enable_irq(sport->irq_num); + up_enable_irq(sport->config.irq_num); } else { sinfo("error ret=%d\n", ret); } - if (!data->sbsa) + if (!sport->config.sbsa) { pl011_enable(sport); } @@ -919,38 +653,18 @@ static int pl011_attach(FAR struct uart_dev_s *dev) static void pl011_shutdown(FAR struct uart_dev_s *dev) { -#ifdef CONFIG_UART_PL011_PLATFORMIF - struct pl011_uart_port_s *sport = (struct pl011_uart_port_s *)dev->priv; - const struct pl011_config *config = &sport->config; - - /* If needed, implement platform specific process such as disabling pl011 - * to reduce power consumption. - */ - - pl011_platform_shutdown((uint32_t)config->uart); -#else UNUSED(dev); sinfo("%s: call unexpected\n", __func__); -#endif } static int pl011_setup(FAR struct uart_dev_s *dev) { FAR struct pl011_uart_port_s *sport = dev->priv; FAR const struct pl011_config *config = &sport->config; - FAR struct pl011_data *data = &sport->data; int ret; uint32_t lcrh; irqstate_t i_flags; -#ifdef CONFIG_UART_PL011_PLATFORMIF - /* If needed, implement platform specific process such as enabling pl011 - * to reduce power consumption. - */ - - pl011_platform_setup((uint32_t)config->uart); -#endif - i_flags = up_irq_save(); /* If working in SBSA mode, we assume that UART is already configured, @@ -958,7 +672,7 @@ static int pl011_setup(FAR struct uart_dev_s *dev) * virtualization software). */ - if (!data->sbsa) + if (!config->sbsa) { /* disable the uart */ @@ -968,7 +682,7 @@ static int pl011_setup(FAR struct uart_dev_s *dev) /* Set baud rate */ ret = pl011_set_baudrate(sport, config->sys_clk_freq, - data->baud_rate); + config->baud_rate); if (ret != 0) { up_irq_restore(i_flags); @@ -977,10 +691,10 @@ static int pl011_setup(FAR struct uart_dev_s *dev) /* Setting the default character format */ - lcrh = config->uart->lcr_h & ~(PL011_LCRH_FORMAT_MASK); + lcrh = config->baseaddr->lcr_h & ~(PL011_LCRH_FORMAT_MASK); lcrh &= ~(BIT(0) | BIT(7)); lcrh |= PL011_LCRH_WLEN_SIZE(8) << PL011_LCRH_WLEN_SHIFT; - config->uart->lcr_h = lcrh; + config->baseaddr->lcr_h = lcrh; /* Enabling the FIFOs */ @@ -989,14 +703,14 @@ static int pl011_setup(FAR struct uart_dev_s *dev) /* initialize all IRQs as masked */ - config->uart->imsc = 0U; - config->uart->icr = PL011_IMSC_MASK_ALL; + config->baseaddr->imsc = 0U; + config->baseaddr->icr = PL011_IMSC_MASK_ALL; - if (!data->sbsa) + if (!config->sbsa) { - config->uart->dmacr = 0U; - config->uart->cr &= ~(BIT(14) | BIT(15) | BIT(1)); - config->uart->cr |= PL011_CR_RXE | PL011_CR_TXE; + config->baseaddr->dmacr = 0U; + config->baseaddr->cr &= ~(BIT(14) | BIT(15) | BIT(1)); + config->baseaddr->cr |= PL011_CR_RXE | PL011_CR_TXE; } up_irq_restore(i_flags); @@ -1010,67 +724,42 @@ static int pl011_setup(FAR struct uart_dev_s *dev) ***************************************************************************/ /*************************************************************************** - * Name: pl011_earlyserialinit + * Name: pl011_dev_init * * Description: - * see nuttx/serial/uart_pl011.h + * Initialize a PL011 device with its configuration settings. * - ***************************************************************************/ - -void pl011_earlyserialinit(void) -{ - /* Enable the console UART. The other UARTs will be initialized if and - * when they are first opened. - */ -#ifdef CONSOLE_DEV - CONSOLE_DEV.isconsole = true; - pl011_setup(&CONSOLE_DEV); -#endif -} - -/*************************************************************************** - * Name: pl011_serialinit + * Arguments: + * - dev The PL011 device struct to initialize * - * Description: - * Register serial console and serial ports. This assumes that - * pl011_earlyserialinit was called previously. + * Return: + * The `struct uart_dev_s` for registering this PL011 device, or NULL on + * failure. * ***************************************************************************/ -void pl011_serialinit(void) +void pl011_dev_init(FAR struct pl011_uart_port_s *priv) { -#ifdef CONSOLE_DEV - uart_register("/dev/console", &CONSOLE_DEV); -#endif -#ifdef TTYS0_DEV - uart_register("/dev/ttyS0", &TTYS0_DEV); -#endif -#ifdef TTYS1_DEV - uart_register("/dev/ttyS1", &TTYS1_DEV); -#endif -#ifdef TTYS2_DEV - uart_register("/dev/ttyS2", &TTYS2_DEV); -#endif -#ifdef TTYS3_DEV - uart_register("/dev/ttyS3", &TTYS3_DEV); -#endif -} + /* Do not re-initialize */ -/*************************************************************************** - * Name: up_putc - * - * Description: - * Provide priority, low-level access to support OS debug writes - * - ***************************************************************************/ + if (priv->inited) + { + return; + } -#ifdef HAVE_PL011_CONSOLE -void up_putc(int ch) -{ - FAR struct uart_dev_s *dev = &CONSOLE_DEV; + /* Private setup */ - pl011_putc(dev, ch); + DEBUGASSERT(priv != NULL); + priv->lock = SP_UNLOCKED; + + /* UART setup */ + + priv->uart.priv = priv; + priv->uart.ops = &g_uart_ops; + DEBUGASSERT(priv->uart.recv.buffer != NULL); + DEBUGASSERT(priv->uart.xmit.buffer != NULL); + + priv->inited = true; } -#endif #endif /* CONFIG_UART_PL011 */ diff --git a/include/nuttx/serial/uart_pl011.h b/include/nuttx/serial/uart_pl011.h index f606151c610db..9fac0f54fa8ec 100644 --- a/include/nuttx/serial/uart_pl011.h +++ b/include/nuttx/serial/uart_pl011.h @@ -29,28 +29,48 @@ #include -#ifdef CONFIG_UART_PL011 +#include > + +#include +#include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** - * Public Functions Prototypes + * Public Types ****************************************************************************/ -void pl011_earlyserialinit(void); +struct pl011_regs; /* Forward opaque type declaration */ + +/* Configuration settings for a PL011 UART port */ + +struct pl011_config +{ + FAR volatile struct pl011_regs *baseaddr; + uint32_t sys_clk_freq; + unsigned int irq_num; + uint32_t baud_rate; + bool sbsa; +}; + +/* PL011 UART device */ -void pl011_serialinit(void); +struct pl011_uart_port_s +{ + struct uart_dev_s uart; /* Underlying UART device */ + struct pl011_config config; /* Configuration settings */ + spinlock_t lock; /* Lock */ + bool inited; /* Initialization tracker */ +}; + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ -#ifdef CONFIG_UART_PL011_PLATFORMIF -/* If needed, implement platform specific process such as enabling pl011 - * to reduce power consumption. - */ +void pl011_dev_init(FAR struct pl011_uart_port_s *priv); -int pl011_platform_setup(uint32_t base); -int pl011_platform_shutdown(uint32_t base); -#endif /* CONFIG_UART_PL011_PLATFORMIF */ +void pl011_putc(struct uart_dev_s *dev, int ch); -#endif /* CONFIG_UART_PL011 */ #endif /* __INCLUDE_NUTTX_SERIAL_UART_PL011_H */