RC-1-cache.lib

EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Conn_Coaxial
#
DEF Connector_Conn_Coaxial J 0 40 Y N 1 F N
F0 "J" 10 120 50 H V C CNN
F1 "Connector_Conn_Coaxial" 115 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 *BNC*
 *SMA*
 *SMB*
 *SMC*
 *Cinch*
$ENDFPLIST
DRAW
A -2 0 71 1636 0 0 1 10 N -70 20 70 0
A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
C 0 0 20 0 1 8 N
P 2 0 1 0 -100 0 -20 0 N
P 2 0 1 0 0 -100 0 -70 N
X In 1 -200 0 100 R 50 50 1 1 P
X Ext 2 0 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Antenna_Dipole
#
DEF Device_Antenna_Dipole AE 0 40 N N 1 F N
F0 "AE" 50 50 50 H V C CNN
F1 "Device_Antenna_Dipole" 50 0 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 8 0 1 10 100 -150 100 -100 200 -100 200 -50 -100 -50 -100 -100 0 -100 0 -150 N
X ~ 1 0 -200 100 U 50 50 1 1 I
X ~ 2 100 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Crystal
#
DEF Device_Crystal Y 0 40 N N 1 F N
F0 "Y" 0 150 50 H V C CNN
F1 "Device_Crystal" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 Crystal*
$ENDFPLIST
DRAW
S -45 100 45 -100 0 1 12 N
P 2 0 1 0 -100 0 -75 0 N
P 2 0 1 20 -75 -50 -75 50 N
P 2 0 1 20 75 -50 75 50 N
P 2 0 1 0 100 0 75 0 N
X 1 1 -150 0 50 R 50 50 1 1 P
X 2 2 150 0 50 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_L
#
DEF Device_L L 0 40 N N 1 F N
F0 "L" -50 0 50 V V C CNN
F1 "Device_L" 75 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 Choke_*
 *Coil*
 Inductor_*
 L_*
$ENDFPLIST
DRAW
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
X 1 1 0 150 50 D 50 50 1 1 P
X 2 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# MCU_ST_STM32F4_STM32F401CEUx
#
DEF MCU_ST_STM32F4_STM32F401CEUx U 0 20 Y Y 1 F N
F0 "U" -600 1550 50 H V L CNN
F1 "MCU_ST_STM32F4_STM32F401CEUx" 200 1550 50 H V L CNN
F2 "Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" -600 -1500 50 H I R CNN
F3 "" 0 0 50 H I C CNN
ALIAS STM32F401CEUx
$FPLIST
 QFN*1EP*7x7mm*P0.5mm*
$ENDFPLIST
DRAW
S -600 -1500 500 1500 0 1 10 f
X VBAT 1 -200 1600 100 D 50 50 1 1 W
X PA0 10 600 100 100 L 50 50 1 1 B
X PA1 11 600 0 100 L 50 50 1 1 B
X PA2 12 600 -100 100 L 50 50 1 1 B
X PA3 13 600 -200 100 L 50 50 1 1 B
X PA4 14 600 -300 100 L 50 50 1 1 B
X PA5 15 600 -400 100 L 50 50 1 1 B
X PA6 16 600 -500 100 L 50 50 1 1 B
X PA7 17 600 -600 100 L 50 50 1 1 B
X PB0 18 -700 0 100 R 50 50 1 1 B
X PB1 19 -700 -100 100 R 50 50 1 1 B
X PC13 2 -700 400 100 R 50 50 1 1 B
X PB2 20 -700 -200 100 R 50 50 1 1 B
X PB10 21 -700 -1000 100 R 50 50 1 1 B
X VCAP1 22 -700 1000 100 R 50 50 1 1 W
X VSS 23 -200 -1600 100 U 50 50 1 1 W
X VDD 24 -100 1600 100 D 50 50 1 1 W
X PB12 25 -700 -1100 100 R 50 50 1 1 B
X PB13 26 -700 -1200 100 R 50 50 1 1 B
X PB14 27 -700 -1300 100 R 50 50 1 1 B
X PB15 28 -700 -1400 100 R 50 50 1 1 B
X PA8 29 600 -700 100 L 50 50 1 1 B
X PC14 3 -700 300 100 R 50 50 1 1 B
X PA9 30 600 -800 100 L 50 50 1 1 B
X PA10 31 600 -900 100 L 50 50 1 1 B
X PA11 32 600 -1000 100 L 50 50 1 1 B
X PA12 33 600 -1100 100 L 50 50 1 1 B
X PA13 34 600 -1200 100 L 50 50 1 1 B
X VSS 35 -100 -1600 100 U 50 50 1 1 W
X VDD 36 0 1600 100 D 50 50 1 1 W
X PA14 37 600 -1300 100 L 50 50 1 1 B
X PA15 38 600 -1400 100 L 50 50 1 1 B
X PB3 39 -700 -300 100 R 50 50 1 1 B
X PC15 4 -700 200 100 R 50 50 1 1 B
X PB4 40 -700 -400 100 R 50 50 1 1 B
X PB5 41 -700 -500 100 R 50 50 1 1 B
X PB6 42 -700 -600 100 R 50 50 1 1 B
X PB7 43 -700 -700 100 R 50 50 1 1 B
X BOOT0 44 -700 1200 100 R 50 50 1 1 I
X PB8 45 -700 -800 100 R 50 50 1 1 B
X PB9 46 -700 -900 100 R 50 50 1 1 B
X VSS 47 0 -1600 100 U 50 50 1 1 W
X VDD 48 100 1600 100 D 50 50 1 1 W
X VSS 49 100 -1600 100 U 50 50 1 1 W
X PH0 5 -700 700 100 R 50 50 1 1 I
X PH1 6 -700 600 100 R 50 50 1 1 I
X NRST 7 -700 1400 100 R 50 50 1 1 I
X VSSA 8 200 -1600 100 U 50 50 1 1 W
X VREF+ 9 -700 900 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# PCIe_M.2_PCIe_M.2_B-Key
#
DEF PCIe_M.2_PCIe_M.2_B-Key P 0 40 Y Y 1 F N
F0 "P" -50 1500 50 H V C CNN
F1 "PCIe_M.2_PCIe_M.2_B-Key" 0 1650 50 H V C CNN
F2 "" 300 -1450 50 H I C CNN
F3 "" 300 -1450 50 H I C CNN
DRAW
S 1100 1800 -1100 -2000 0 1 0 f
X CONFIG_3 1 1200 -1850 100 L 50 50 1 1 I
X GPIO_9/DAS/DSS#_(I/O)/LED1#(I)_(0/3.3V) 10 -1200 -1400 100 R 50 50 1 1 I
X GND 11 1200 -1350 100 L 50 50 1 1 I
X 3.3V 2 -1200 -1800 100 R 50 50 1 1 I
X GPIO_5_(I/O)_(0/1.8V) 20 -1200 -1100 100 R 50 50 1 1 I
X CONFIG_0 21 1200 -1050 100 L 50 50 1 1 I
X GPIO_6_(I/O)_(0/1.8V) 22 -1200 -1000 100 R 50 50 1 1 I
X GPIO_11_(I/O)_(0/1.8V) 23 1200 -950 100 L 50 50 1 1 I
X GPIO_7_(I/O)_(0/1.8V) 24 -1200 -900 100 R 50 50 1 1 I
X DPR_(O)_(0/1.8V) 25 1200 -850 100 L 50 50 1 1 I
X GPIO_10_(I/O)_(0/1.8V) 26 -1200 -800 100 R 50 50 1 1 I
X GND 27 1200 -750 100 L 50 50 1 1 I
X GPIO_8_(I/O)_(0/1.8V) 28 -1200 -700 100 R 50 50 1 1 I
X PERn1/USB3.0-Rx-/SSIC-RxN 29 1200 -650 100 L 50 50 1 1 I
X GND 3 1200 -1750 100 L 50 50 1 1 I
X UIM-RESET_(I) 30 -1200 -600 100 R 50 50 1 1 I
X PERp1/USB3.0-Rx+/SSIC-RxP 31 1200 -550 100 L 50 50 1 1 I
X UIM-CLK_(I) 32 -1200 -500 100 R 50 50 1 1 I
X GND 33 1200 -450 100 L 50 50 1 1 I
X UIM-DATA_(I/O) 34 -1200 -400 100 R 50 50 1 1 I
X PETn1/USB3.0-Tx-/SSIC-TxN 35 1200 -350 100 L 50 50 1 1 I
X UIM-PWR_(I) 36 -1200 -300 100 R 50 50 1 1 I
X PETp1/USB3.0-Tx+/SSIC-TxP 37 1200 -250 100 L 50 50 1 1 I
X DEVSLP_(O) 38 -1200 -200 100 R 50 50 1 1 I
X GND 39 1200 -150 100 L 50 50 1 1 I
X 3.3V 4 -1200 -1700 100 R 50 50 1 1 I
X GPIO_0_(I/O)_(0/3.3V) 40 -1200 -100 100 R 50 50 1 1 I
X PERn0/SATA-B+ 41 1200 -50 100 L 50 50 1 1 I
X GPIO_1_(I/O)_(0/3.3V) 42 -1200 0 100 R 50 50 1 1 I
X PERp0/SATA-B- 43 1200 50 100 L 50 50 1 1 I
X GPIO_2_(I/O)_(0/3.3V) 44 -1200 100 100 R 50 50 1 1 I
X GND 45 1200 150 100 L 50 50 1 1 I
X GPIO_3_(I/O)_(0/3.3V) 46 -1200 200 100 R 50 50 1 1 I
X PETn0/SATA-A- 47 1200 250 100 L 50 50 1 1 I
X GPIO_4_(I/O)_(0/3.3V) 48 -1200 300 100 R 50 50 1 1 I
X PETp0/SATA-A+ 49 1200 350 100 L 50 50 1 1 I
X GND 5 1200 -1650 100 L 50 50 1 1 I
X PERST#_(O)_(0/3.3V) 50 -1200 400 100 R 50 50 1 1 I
X GND 51 1200 450 100 L 50 50 1 1 I
X CLKREQ#_(I/O)_(0/3.3V) 52 -1200 500 100 R 50 50 1 1 I
X REFCLKn 53 1200 550 100 L 50 50 1 1 I
X PEWAKE#_(I/O)_(0/3.3V) 54 -1200 600 100 R 50 50 1 1 I
X REFCLKp 55 1200 650 100 L 50 50 1 1 I
X N/C 56 -1200 700 100 R 50 50 1 1 I
X GND 57 1200 750 100 L 50 50 1 1 I
X N/C 58 -1200 800 100 R 50 50 1 1 I
X ANTCTL0_(I)_(0/1.8V) 59 1200 850 100 L 50 50 1 1 I
X FULL_CARD_POWER_OFF#_(O)_(0/1.8V_or_3.3V) 6 -1200 -1600 100 R 50 50 1 1 I
X COEX3_(I/O)_(0/1.8V) 60 -1200 900 100 R 50 50 1 1 I
X ANTCTL1_(I)_(0/1.8V) 61 1200 950 100 L 50 50 1 1 I
X COEX2_(I/O)_(0/1.8V) 62 -1200 1000 100 R 50 50 1 1 I
X ANTCTL2_(I)_(0/1.8V) 63 1200 1050 100 L 50 50 1 1 I
X COEX1_(I/O)_(0/1.8V) 64 -1200 1100 100 R 50 50 1 1 I
X ANTCTL3_(I)_(0/1.8V) 65 1200 1150 100 L 50 50 1 1 I
X SIM_DETECT_(O) 66 -1200 1200 100 R 50 50 1 1 I
X RESET#_(O)_(0/1.8V) 67 1200 1250 100 L 50 50 1 1 I
X SUSCLK(32KHz)_(O)_(0/3.3V) 68 -1200 1300 100 R 50 50 1 1 I
X CONFIG_1 69 1200 1350 100 L 50 50 1 1 I
X USB_D+ 7 1200 -1550 100 L 50 50 1 1 I
X 3.3V 70 -1200 1400 100 R 50 50 1 1 I
X GND 71 1200 1450 100 L 50 50 1 1 I
X 3.3V 72 -1200 1500 100 R 50 50 1 1 I
X GND 73 1200 1550 100 L 50 50 1 1 I
X 3.3V 74 -1200 1600 100 R 50 50 1 1 I
X CONFIG_2 75 1200 1650 100 L 50 50 1 1 I
X W_DISABLE#_(O)_(0/3.3V) 8 -1200 -1500 100 R 50 50 1 1 I
X USB_D- 9 1200 -1450 100 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# adf7021_ADF7021
#
DEF adf7021_ADF7021 U 0 40 Y Y 1 F N
F0 "U" 0 -250 50 H V C CNN
F1 "adf7021_ADF7021" 0 300 50 H V C CNN
F2 "Package_CSP:LFCSP-48-1EP_7x7mm_P0.5mm_EP4.1x4.1mm" -50 -1200 50 H I C CNN
F3 "" -300 350 50 H I C CNN
DRAW
S -850 -850 850 850 0 1 0 f
X VCOIN 1 -950 550 100 R 50 50 1 1 I
X RSET 10 -950 -350 100 R 50 50 1 1 I
X CREG4 11 -950 -450 100 R 50 50 1 1 I
X GND4 12 -950 -550 100 R 50 50 1 1 I
X MIX_I 13 -550 -950 100 U 50 50 1 1 I
X NMIX_I 14 -450 -950 100 U 50 50 1 1 I
X MIX_Q 15 -350 -950 100 U 50 50 1 1 I
X NMIX_Q 16 -250 -950 100 U 50 50 1 1 I
X FILT_I 17 -150 -950 100 U 50 50 1 1 I
X NFILT_I 18 -50 -950 100 U 50 50 1 1 I
X GND4 19 50 -950 100 U 50 50 1 1 I
X CREG1 2 -950 450 100 R 50 50 1 1 I
X FILT_Q 20 150 -950 100 U 50 50 1 1 I
X NFILT_Q 21 250 -950 100 U 50 50 1 1 I
X GND4 22 350 -950 100 U 50 50 1 1 I
X TEST_A 23 450 -950 100 U 50 50 1 1 I
X CE 24 550 -950 100 U 50 50 1 1 I
X SLE 25 950 -550 100 L 50 50 1 1 I
X SDATA 26 950 -450 100 L 50 50 1 1 I
X SREAD 27 950 -350 100 L 50 50 1 1 I
X SCLK 28 950 -250 100 L 50 50 1 1 I
X GND2 29 950 -150 100 L 50 50 1 1 I
X VDD1 3 -950 350 100 R 50 50 1 1 I
X ADCIN 30 950 -50 100 L 50 50 1 1 I
X CREG2 31 950 50 100 L 50 50 1 1 I
X VDD2 32 950 150 100 L 50 50 1 1 I
X SWD 33 950 250 100 L 50 50 1 1 I
X TxRxDATA 34 950 350 100 L 50 50 1 1 I
X TxRxCLK 35 950 450 100 L 50 50 1 1 I
X CLKOUT 36 950 550 100 L 50 50 1 1 I
X MUXOUT 37 550 950 100 D 50 50 1 1 I
X OSC2 38 450 950 100 D 50 50 1 1 I
X OSC1 39 350 950 100 D 50 50 1 1 I
X RFOUT 4 -950 250 100 R 50 50 1 1 I
X VDD3 40 250 950 100 D 50 50 1 1 I
X CREG3 41 150 950 100 D 50 50 1 1 I
X CPOUT 42 50 950 100 D 50 50 1 1 I
X VDD 43 -50 950 100 D 50 50 1 1 I
X L2 44 -150 950 100 D 50 50 1 1 I
X GND 45 -250 950 100 D 50 50 1 1 I
X L1 46 -350 950 100 D 50 50 1 1 I
X GND1 47 -450 950 100 D 50 50 1 1 I
X CVCO 48 -550 950 100 D 50 50 1 1 I
X EPAD 49 950 -800 100 L 50 50 1 1 I
X RFGND 5 -950 150 100 R 50 50 1 1 I
X RFIN 6 -950 50 100 R 50 50 1 1 I
X RFINB 7 -950 -50 100 R 50 50 1 1 I
X RLNA 8 -950 -150 100 R 50 50 1 1 I
X VDD4 9 -950 -250 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_VDD
#
DEF power_VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_VDD" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# tcxo_TCXO
#
DEF tcxo_TCXO X 0 40 Y Y 1 F N
F0 "X" -250 250 50 H V C CNN
F1 "tcxo_TCXO" 250 250 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S 300 -200 -300 200 0 1 0 f
X Vctrl 1 400 0 100 L 50 50 1 1 I
X GND 2 0 -300 100 U 50 50 1 1 I
X RFout 3 -400 0 100 R 50 50 1 1 I
X VDD 4 0 300 100 D 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library